Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
49 lines
902 B
ArmAsm
49 lines
902 B
ArmAsm
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Enter and leave sleep state on chips with 6xx-style HID0
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* power management bits, which don't leave sleep state via reset.
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*
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* Author: Scott Wood <scottwood@freescale.com>
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*
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* Copyright (c) 2006-2007 Freescale Semiconductor, Inc.
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*/
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#include <asm/ppc_asm.h>
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#include <asm/reg.h>
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#include <asm/thread_info.h>
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#include <asm/asm-offsets.h>
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_GLOBAL(mpc6xx_enter_standby)
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mflr r4
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mfspr r5, SPRN_HID0
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rlwinm r5, r5, 0, ~(HID0_DOZE | HID0_NAP)
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oris r5, r5, HID0_SLEEP@h
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mtspr SPRN_HID0, r5
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isync
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lis r5, ret_from_standby@h
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ori r5, r5, ret_from_standby@l
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mtlr r5
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lwz r6, TI_LOCAL_FLAGS(r2)
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ori r6, r6, _TLF_SLEEPING
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stw r6, TI_LOCAL_FLAGS(r2)
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mfmsr r5
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ori r5, r5, MSR_EE
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oris r5, r5, MSR_POW@h
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sync
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mtmsr r5
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isync
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1: b 1b
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ret_from_standby:
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mfspr r5, SPRN_HID0
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rlwinm r5, r5, 0, ~HID0_SLEEP
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mtspr SPRN_HID0, r5
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mtlr r4
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blr
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