Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
23 lines
530 B
C
23 lines
530 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright Intel Corporation (C) 2017. All Rights Reserved
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*
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* Reset binding definitions for Altera Arria10 MAX5 System Resource Chip
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*
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* Adapted from altr,rst-mgr-a10.h
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*/
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#ifndef _DT_BINDINGS_RESET_ALTR_RST_MGR_A10SR_H
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#define _DT_BINDINGS_RESET_ALTR_RST_MGR_A10SR_H
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/* Peripheral PHY resets */
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#define A10SR_RESET_ENET_HPS 0
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#define A10SR_RESET_PCIE 1
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#define A10SR_RESET_FILE 2
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#define A10SR_RESET_BQSPI 3
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#define A10SR_RESET_USB 4
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#define A10SR_RESET_NUM 5
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#endif
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