Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
24 lines
507 B
C
24 lines
507 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* include/asm-alpha/cache.h
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*/
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#ifndef __ARCH_ALPHA_CACHE_H
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#define __ARCH_ALPHA_CACHE_H
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/* Bytes per L1 (data) cache line. */
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#if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_EV6)
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# define L1_CACHE_BYTES 64
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# define L1_CACHE_SHIFT 6
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#else
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/* Both EV4 and EV5 are write-through, read-allocate,
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direct-mapped, physical.
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*/
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# define L1_CACHE_BYTES 32
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# define L1_CACHE_SHIFT 5
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#endif
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#define SMP_CACHE_BYTES L1_CACHE_BYTES
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#endif
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