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cubelinux-kernel/Documentation/devicetree/bindings/ata/eswin,eic7700-ahci.yaml
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Greg Kroah-Hartman 598cf27219 Linux 6.19.3
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org
Tested-by: Florian Fainelli <florian.fainelli@broadcom.com>
Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com>
Tested-by: Peter Schneider <pschneider1968@googlemail.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Salvatore Bonaccorso <carnil@debian.org>
Tested-by: Brett A C Sheffield <bacs@librecast.net>
Tested-by: Mark Brown <broonie@kernel.org>
Tested-by: Luna Jernberg <droidbittin@gmail.com>
Tested-by: Ronald Warsow <rwarsow@gmx.de>
Tested-by: Justin M. Forbes <jforbes@fedoraproject.org>
Tested-by: Ron Economos <re@w6rz.net>
Tested-by: Miguel Ojeda <ojeda@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-02-19 16:33:27 +01:00

80 lines
1.5 KiB
YAML

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/ata/eswin,eic7700-ahci.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Eswin EIC7700 SoC SATA Controller
maintainers:
- Yulin Lu <luyulin@eswincomputing.com>
- Huan He <hehuan1@eswincomputing.com>
description:
AHCI SATA controller embedded into the EIC7700 SoC is based on the DWC AHCI
SATA v5.00a IP core.
select:
properties:
compatible:
const: eswin,eic7700-ahci
required:
- compatible
allOf:
- $ref: snps,dwc-ahci-common.yaml#
properties:
compatible:
items:
- const: eswin,eic7700-ahci
- const: snps,dwc-ahci
clocks:
minItems: 2
maxItems: 2
clock-names:
items:
- const: pclk
- const: aclk
resets:
maxItems: 1
reset-names:
const: arst
ports-implemented:
const: 1
required:
- compatible
- reg
- interrupts
- clocks
- clock-names
- resets
- reset-names
- phys
- phy-names
- ports-implemented
unevaluatedProperties: false
examples:
- |
sata@50420000 {
compatible = "eswin,eic7700-ahci", "snps,dwc-ahci";
reg = <0x50420000 0x10000>;
interrupt-parent = <&plic>;
interrupts = <58>;
clocks = <&clock 171>, <&clock 186>;
clock-names = "pclk", "aclk";
phys = <&sata_phy>;
phy-names = "sata-phy";
ports-implemented = <0x1>;
resets = <&reset 96>;
reset-names = "arst";
};