Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
56 lines
1.8 KiB
Plaintext
56 lines
1.8 KiB
Plaintext
Freescale L2 Cache Controller
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L2 cache is present in Freescale's QorIQ and QorIQ Qonverge platforms.
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The cache bindings explained below are Devicetree Specification compliant
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Required Properties:
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- compatible : Should include one of the following:
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"fsl,b4420-l2-cache-controller"
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"fsl,b4860-l2-cache-controller"
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"fsl,bsc9131-l2-cache-controller"
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"fsl,bsc9132-l2-cache-controller"
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"fsl,c293-l2-cache-controller"
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"fsl,mpc8536-l2-cache-controller"
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"fsl,mpc8540-l2-cache-controller"
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"fsl,mpc8541-l2-cache-controller"
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"fsl,mpc8544-l2-cache-controller"
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"fsl,mpc8548-l2-cache-controller"
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"fsl,mpc8555-l2-cache-controller"
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"fsl,mpc8560-l2-cache-controller"
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"fsl,mpc8568-l2-cache-controller"
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"fsl,mpc8569-l2-cache-controller"
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"fsl,mpc8572-l2-cache-controller"
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"fsl,p1010-l2-cache-controller"
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"fsl,p1011-l2-cache-controller"
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"fsl,p1012-l2-cache-controller"
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"fsl,p1013-l2-cache-controller"
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"fsl,p1014-l2-cache-controller"
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"fsl,p1015-l2-cache-controller"
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"fsl,p1016-l2-cache-controller"
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"fsl,p1020-l2-cache-controller"
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"fsl,p1021-l2-cache-controller"
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"fsl,p1022-l2-cache-controller"
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"fsl,p1023-l2-cache-controller"
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"fsl,p1024-l2-cache-controller"
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"fsl,p1025-l2-cache-controller"
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"fsl,p2010-l2-cache-controller"
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"fsl,p2020-l2-cache-controller"
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"fsl,t2080-l2-cache-controller"
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"fsl,t4240-l2-cache-controller"
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and "cache".
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- reg : Address and size of L2 cache controller registers
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- cache-size : Size of the entire L2 cache
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- interrupts : Error interrupt of L2 controller
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- cache-line-size : Size of L2 cache lines
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Example:
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L2: l2-cache-controller@20000 {
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compatible = "fsl,bsc9132-l2-cache-controller", "cache";
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reg = <0x20000 0x1000>;
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cache-line-size = <32>; // 32 bytes
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cache-size = <0x40000>; // L2,256K
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interrupts = <16 2 1 0>;
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};
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