Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
88 lines
1.7 KiB
YAML
88 lines
1.7 KiB
YAML
# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-mmc-clk.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Allwinner A10 Module 1 Clock
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maintainers:
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- Chen-Yu Tsai <wens@csie.org>
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- Maxime Ripard <mripard@kernel.org>
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deprecated: true
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properties:
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"#clock-cells":
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const: 1
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description: >
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There is three different outputs: the main clock, with the ID 0,
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and the output and sample clocks, with the IDs 1 and 2,
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respectively.
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compatible:
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enum:
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- allwinner,sun4i-a10-mmc-clk
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- allwinner,sun9i-a80-mmc-clk
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reg:
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maxItems: 1
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clocks:
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minItems: 2
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maxItems: 3
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description: >
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The parent order must match the hardware programming order.
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clock-output-names:
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maxItems: 3
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required:
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- "#clock-cells"
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- compatible
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- reg
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- clocks
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- clock-output-names
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additionalProperties: false
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if:
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properties:
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compatible:
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contains:
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const: allwinner,sun4i-a10-mmc-clk
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then:
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properties:
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clocks:
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maxItems: 3
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else:
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properties:
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clocks:
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maxItems: 2
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examples:
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- |
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clk@1c20088 {
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#clock-cells = <1>;
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compatible = "allwinner,sun4i-a10-mmc-clk";
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reg = <0x01c20088 0x4>;
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clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
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clock-output-names = "mmc0",
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"mmc0_output",
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"mmc0_sample";
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};
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- |
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clk@6000410 {
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#clock-cells = <1>;
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compatible = "allwinner,sun9i-a80-mmc-clk";
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reg = <0x06000410 0x4>;
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clocks = <&osc24M>, <&pll4>;
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clock-output-names = "mmc0", "mmc0_output",
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"mmc0_sample";
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};
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...
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