Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
81 lines
1.6 KiB
YAML
81 lines
1.6 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/apm,xgene-device-clock.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: APM X-Gene SoC device clocks
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maintainers:
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- Khuong Dinh <khuong@os.amperecomputing.com>
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properties:
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compatible:
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const: apm,xgene-device-clock
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reg:
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minItems: 1
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maxItems: 2
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reg-names:
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items:
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- enum: [ csr-reg, div-reg ]
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- const: div-reg
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minItems: 1
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clocks:
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maxItems: 1
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"#clock-cells":
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const: 1
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clock-output-names:
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maxItems: 1
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clock-names:
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maxItems: 1
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csr-offset:
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description: Offset to the CSR reset register
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$ref: /schemas/types.yaml#/definitions/uint32
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default: 0
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csr-mask:
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description: CSR reset mask bit
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$ref: /schemas/types.yaml#/definitions/uint32
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default: 0xf
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enable-offset:
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description: Offset to the enable register
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$ref: /schemas/types.yaml#/definitions/uint32
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default: 8
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enable-mask:
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description: CSR enable mask bit
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$ref: /schemas/types.yaml#/definitions/uint32
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default: 0xf
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divider-offset:
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description: Offset to the divider register
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$ref: /schemas/types.yaml#/definitions/uint32
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default: 0
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divider-width:
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description: Width of the divider register
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$ref: /schemas/types.yaml#/definitions/uint32
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default: 0
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divider-shift:
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description: Bit shift of the divider register
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$ref: /schemas/types.yaml#/definitions/uint32
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default: 0
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required:
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- compatible
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- reg
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- clocks
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- '#clock-cells'
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- clock-output-names
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additionalProperties: false
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