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cubelinux-kernel/Documentation/devicetree/bindings/dma/arm,pl330.yaml
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Greg Kroah-Hartman 598cf27219 Linux 6.19.3
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org
Tested-by: Florian Fainelli <florian.fainelli@broadcom.com>
Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com>
Tested-by: Peter Schneider <pschneider1968@googlemail.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Salvatore Bonaccorso <carnil@debian.org>
Tested-by: Brett A C Sheffield <bacs@librecast.net>
Tested-by: Mark Brown <broonie@kernel.org>
Tested-by: Luna Jernberg <droidbittin@gmail.com>
Tested-by: Ronald Warsow <rwarsow@gmx.de>
Tested-by: Justin M. Forbes <jforbes@fedoraproject.org>
Tested-by: Ron Economos <re@w6rz.net>
Tested-by: Miguel Ojeda <ojeda@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-02-19 16:33:27 +01:00

93 lines
1.8 KiB
YAML

# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/dma/arm,pl330.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: ARM PrimeCell PL330 DMA Controller
maintainers:
- Vinod Koul <vkoul@kernel.org>
description:
The ARM PrimeCell PL330 DMA controller can move blocks of memory contents
between memory and peripherals or memory to memory.
# We need a select here so we don't match all nodes with 'arm,primecell'
select:
properties:
compatible:
contains:
const: arm,pl330
required:
- compatible
allOf:
- $ref: dma-controller.yaml#
- $ref: /schemas/arm/primecell.yaml#
properties:
compatible:
items:
- enum:
- arm,pl330
- const: arm,primecell
reg:
maxItems: 1
interrupts:
minItems: 1
maxItems: 32
description: A single combined interrupt or an interrupt per event
'#dma-cells':
const: 1
description: Contains the DMA request number for the consumer
arm,pl330-broken-no-flushp:
type: boolean
description: quirk for avoiding to execute DMAFLUSHP
arm,pl330-periph-burst:
type: boolean
description: quirk for performing burst transfer only
dma-coherent: true
iommus:
minItems: 1
maxItems: 9
description: Up to 1 IOMMU entry per DMA channel for writes and 1
IOMMU entry for reads.
power-domains:
maxItems: 1
resets:
minItems: 1
maxItems: 2
reset-names:
minItems: 1
items:
- const: dma
- const: dma-ocp
required:
- compatible
- reg
- interrupts
unevaluatedProperties: false
examples:
- |
dma-controller@12680000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x12680000 0x1000>;
interrupts = <99>;
#dma-cells = <1>;
};
...