Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
25 lines
727 B
Plaintext
25 lines
727 B
Plaintext
* Milbeaut AXI DMA Controller
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Milbeaut AXI DMA controller has only memory to memory transfer capability.
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* DMA controller
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Required property:
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- compatible: Should be "socionext,milbeaut-m10v-xdmac"
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- reg: Should contain DMA registers location and length.
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- interrupts: Should contain all of the per-channel DMA interrupts.
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Number of channels is configurable - 2, 4 or 8, so
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the number of interrupts specified should be {2,4,8}.
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- #dma-cells: Should be 1.
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Example:
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xdmac0: dma-controller@1c250000 {
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compatible = "socionext,milbeaut-m10v-xdmac";
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reg = <0x1c250000 0x1000>;
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interrupts = <0 17 0x4>,
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<0 18 0x4>,
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<0 19 0x4>,
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<0 20 0x4>;
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#dma-cells = <1>;
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};
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