Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
101 lines
2.7 KiB
YAML
101 lines
2.7 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
|
%YAML 1.2
|
|
---
|
|
$id: http://devicetree.org/schemas/dma/nvidia,tegra20-apbdma.yaml#
|
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
|
|
|
title: NVIDIA Tegra APB DMA Controller
|
|
|
|
description:
|
|
The NVIDIA Tegra APB DMA controller is a hardware component that
|
|
enables direct memory access (DMA) on Tegra systems. It facilitates
|
|
data transfer between I/O devices and main memory without constant
|
|
CPU intervention.
|
|
|
|
maintainers:
|
|
- Jonathan Hunter <jonathanh@nvidia.com>
|
|
|
|
properties:
|
|
compatible:
|
|
oneOf:
|
|
- enum:
|
|
- nvidia,tegra114-apbdma
|
|
- nvidia,tegra20-apbdma
|
|
- items:
|
|
- const: nvidia,tegra30-apbdma
|
|
- const: nvidia,tegra20-apbdma
|
|
- items:
|
|
- enum:
|
|
- nvidia,tegra124-apbdma
|
|
- nvidia,tegra210-apbdma
|
|
- const: nvidia,tegra148-apbdma
|
|
|
|
reg:
|
|
maxItems: 1
|
|
|
|
"#dma-cells":
|
|
const: 1
|
|
|
|
clocks:
|
|
maxItems: 1
|
|
|
|
clock-names:
|
|
const: dma
|
|
|
|
interrupts:
|
|
description:
|
|
Should contain all of the per-channel DMA interrupts in
|
|
ascending order with respect to the DMA channel index.
|
|
minItems: 1
|
|
maxItems: 32
|
|
|
|
resets:
|
|
maxItems: 1
|
|
|
|
reset-names:
|
|
const: dma
|
|
|
|
required:
|
|
- compatible
|
|
- reg
|
|
- "#dma-cells"
|
|
- clocks
|
|
- interrupts
|
|
- resets
|
|
- reset-names
|
|
|
|
allOf:
|
|
- $ref: dma-controller.yaml#
|
|
|
|
unevaluatedProperties: false
|
|
|
|
examples:
|
|
- |
|
|
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
|
#include <dt-bindings/reset/tegra186-reset.h>
|
|
dma-controller@6000a000 {
|
|
compatible = "nvidia,tegra30-apbdma", "nvidia,tegra20-apbdma";
|
|
reg = <0x6000a000 0x1200>;
|
|
interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
|
|
<GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
|
|
<GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
|
|
<GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>,
|
|
<GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
|
|
<GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
|
|
<GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
|
|
<GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
|
|
<GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>,
|
|
<GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
|
|
<GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
|
|
<GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
|
|
<GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
|
|
<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
|
|
<GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>,
|
|
<GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&tegra_car 34>;
|
|
resets = <&tegra_car 34>;
|
|
reset-names = "dma";
|
|
#dma-cells = <1>;
|
|
};
|
|
...
|