Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
85 lines
1.7 KiB
YAML
85 lines
1.7 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/gpio/cdns,gpio.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Cadence GPIO Controller
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maintainers:
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- Jan Kotas <jank@cadence.com>
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properties:
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compatible:
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oneOf:
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- const: cdns,gpio-r1p02
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- items:
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- enum:
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- axiado,ax3000-gpio
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- const: cdns,gpio-r1p02
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reg:
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maxItems: 1
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clocks:
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maxItems: 1
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ngpios:
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minimum: 1
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maximum: 32
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gpio-controller: true
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"#gpio-cells":
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const: 2
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description: |
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- First cell is the GPIO line number.
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- Second cell is flags as defined in <dt-bindings/gpio/gpio.h>,
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only GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW supported.
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interrupt-controller: true
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"#interrupt-cells":
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const: 2
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description: |
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- First cell is the GPIO line number used as IRQ.
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- Second cell is the trigger type, as defined in
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<dt-bindings/interrupt-controller/irq.h>.
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interrupts:
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maxItems: 1
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required:
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- compatible
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- reg
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- clocks
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- gpio-controller
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- "#gpio-cells"
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if:
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required: [interrupt-controller]
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then:
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required:
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- interrupts
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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gpio0: gpio-controller@fd060000 {
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compatible = "cdns,gpio-r1p02";
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reg = <0xfd060000 0x1000>;
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clocks = <&gpio_clk>;
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interrupt-parent = <&gic>;
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interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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