Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
51 lines
970 B
YAML
51 lines
970 B
YAML
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/gpio/nxp,lpc3220-gpio.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: NXP LPC3220 SoC GPIO controller
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maintainers:
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- Animesh Agarwal <animeshagarwal28@gmail.com>
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properties:
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compatible:
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const: nxp,lpc3220-gpio
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reg:
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maxItems: 1
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gpio-controller: true
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'#gpio-cells':
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const: 3
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description: |
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1) bank:
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0: GPIO P0
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1: GPIO P1
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2: GPIO P2
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3: GPIO P3
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4: GPI P3
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5: GPO P3
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2) pin number
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3) flags:
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- bit 0 specifies polarity (0 for normal, 1 for inverted)
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required:
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- compatible
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- reg
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- gpio-controller
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- '#gpio-cells'
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additionalProperties: false
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examples:
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- |
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gpio@40028000 {
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compatible = "nxp,lpc3220-gpio";
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reg = <0x40028000 0x1000>;
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gpio-controller;
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#gpio-cells = <3>; /* bank, pin, flags */
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};
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