Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
105 lines
1.9 KiB
YAML
105 lines
1.9 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/iio/adc/rohm,bd79112.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: ROHM BD79112 ADC/GPO
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maintainers:
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- Matti Vaittinen <mazziesaccount@gmail.com>
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description: |
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The ROHM BD79112 is a 12-bit, 32-channel, SAR ADC. ADC input pins can be
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also configured as general purpose inputs/outputs. SPI should use MODE 3.
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properties:
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compatible:
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const: rohm,bd79112
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reg:
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maxItems: 1
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spi-cpha: true
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spi-cpol: true
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gpio-controller: true
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"#gpio-cells":
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const: 2
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vdd-supply: true
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iovdd-supply: true
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"#address-cells":
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const: 1
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"#size-cells":
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const: 0
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patternProperties:
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"^channel@([0-9]|[12][0-9]|3[01])$":
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type: object
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$ref: /schemas/iio/adc/adc.yaml#
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description: Represents ADC channel. Omitted channels' inputs are GPIOs.
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properties:
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reg:
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description: AIN pin number
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minimum: 0
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maximum: 31
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required:
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- reg
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additionalProperties: false
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required:
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- compatible
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- reg
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- iovdd-supply
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- vdd-supply
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- spi-cpha
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- spi-cpol
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additionalProperties: false
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examples:
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- |
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spi {
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#address-cells = <1>;
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#size-cells = <0>;
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adc: adc@0 {
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compatible = "rohm,bd79112";
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reg = <0x0>;
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spi-cpha;
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spi-cpol;
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vdd-supply = <&dummyreg>;
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iovdd-supply = <&dummyreg>;
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#address-cells = <1>;
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#size-cells = <0>;
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gpio-controller;
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#gpio-cells = <2>;
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channel@0 {
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reg = <0>;
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};
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channel@1 {
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reg = <1>;
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};
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channel@2 {
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reg = <2>;
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};
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channel@16 {
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reg = <16>;
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};
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channel@20 {
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reg = <20>;
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};
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};
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};
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