Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
68 lines
1.6 KiB
YAML
68 lines
1.6 KiB
YAML
# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/interrupt-controller/allwinner,sun6i-a31-r-intc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Allwinner A31 NMI/Wakeup Interrupt Controller
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maintainers:
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- Chen-Yu Tsai <wens@csie.org>
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- Maxime Ripard <mripard@kernel.org>
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allOf:
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- $ref: /schemas/interrupt-controller.yaml#
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properties:
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"#interrupt-cells":
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const: 3
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description:
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The first cell is GIC_SPI (0), the second cell is the IRQ number, and
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the third cell is the trigger type as defined in interrupt.txt in this
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directory.
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compatible:
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oneOf:
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- const: allwinner,sun6i-a31-r-intc
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- items:
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- enum:
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- allwinner,sun8i-a83t-r-intc
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- allwinner,sun8i-h3-r-intc
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- allwinner,sun50i-a64-r-intc
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- const: allwinner,sun6i-a31-r-intc
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- const: allwinner,sun50i-h6-r-intc
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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description:
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The GIC interrupt labeled as "External NMI".
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interrupt-controller: true
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required:
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- "#interrupt-cells"
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- compatible
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- reg
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- interrupts
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- interrupt-controller
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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r_intc: interrupt-controller@1f00c00 {
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compatible = "allwinner,sun50i-a64-r-intc",
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"allwinner,sun6i-a31-r-intc";
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interrupt-controller;
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#interrupt-cells = <3>;
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reg = <0x01f00c00 0x400>;
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interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
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};
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...
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