Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
50 lines
1.1 KiB
YAML
50 lines
1.1 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
|
%YAML 1.2
|
|
---
|
|
$id: http://devicetree.org/schemas/interrupt-controller/brcm,bcm2836-l1-intc.yaml#
|
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
|
|
|
title: BCM2836 per-CPU interrupt controller
|
|
|
|
maintainers:
|
|
- Stefan Wahren <wahrenst@gmx.net>
|
|
- Raspberry Pi Kernel Maintenance <kernel-list@raspberrypi.com>
|
|
|
|
description:
|
|
The BCM2836 has a per-cpu interrupt controller for the timer, PMU
|
|
events, and SMP IPIs. One of the CPUs may receive interrupts for the
|
|
peripheral (GPU) events, which chain to the BCM2835-style interrupt
|
|
controller.
|
|
|
|
allOf:
|
|
- $ref: /schemas/interrupt-controller.yaml#
|
|
|
|
properties:
|
|
compatible:
|
|
const: brcm,bcm2836-l1-intc
|
|
|
|
reg:
|
|
maxItems: 1
|
|
|
|
interrupt-controller: true
|
|
|
|
'#interrupt-cells':
|
|
const: 2
|
|
|
|
required:
|
|
- compatible
|
|
- reg
|
|
|
|
additionalProperties: false
|
|
|
|
examples:
|
|
- |
|
|
local_intc: interrupt-controller@40000000 {
|
|
compatible = "brcm,bcm2836-l1-intc";
|
|
reg = <0x40000000 0x100>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
interrupt-parent = <&local_intc>;
|
|
};
|
|
...
|