Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
53 lines
1.1 KiB
YAML
53 lines
1.1 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/interrupt-controller/qca,ar7100-misc-intc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Atheros AR7xxx/AR9XXX MISC interrupt controller
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maintainers:
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- Alban Bedel <albeu@free.fr>
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- Alexander Couzens <lynxis@fe80.eu>
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description:
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The Qualcomm Atheros AR7xxx/AR9XXX MISC interrupt controller is a secondary
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controller for lower priority interrupts.
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properties:
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compatible:
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oneOf:
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- items:
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- const: qca,ar9132-misc-intc
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- const: qca,ar7100-misc-intc
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- const: qca,ar7240-misc-intc
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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interrupt-controller: true
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'#interrupt-cells':
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const: 1
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additionalProperties: false
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required:
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- compatible
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- reg
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- interrupts
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- interrupt-controller
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- "#interrupt-cells"
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examples:
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- |
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interrupt-controller@18060010 {
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compatible = "qca,ar9132-misc-intc", "qca,ar7100-misc-intc";
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reg = <0x18060010 0x4>;
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interrupts = <6>;
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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