Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
47 lines
1.1 KiB
Plaintext
47 lines
1.1 KiB
Plaintext
* UCTL USB controller glue
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Properties:
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- compatible: "cavium,octeon-6335-uctl"
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Compatibility with all cn6XXX SOCs.
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- reg: The base address of the UCTL register bank.
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- #address-cells: Must be <2>.
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- #size-cells: Must be <2>.
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- ranges: Empty to signify direct mapping of the children.
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- refclk-frequency: A single cell containing the reference clock
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frequency in Hz.
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- refclk-type: A string describing the reference clock connection
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either "crystal" or "external".
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Example:
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uctl@118006f000000 {
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compatible = "cavium,octeon-6335-uctl";
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reg = <0x11800 0x6f000000 0x0 0x100>;
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ranges; /* Direct mapping */
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#address-cells = <2>;
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#size-cells = <2>;
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/* 12MHz, 24MHz and 48MHz allowed */
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refclk-frequency = <24000000>;
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/* Either "crystal" or "external" */
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refclk-type = "crystal";
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ehci@16f0000000000 {
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compatible = "cavium,octeon-6335-ehci","usb-ehci";
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reg = <0x16f00 0x00000000 0x0 0x100>;
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interrupts = <0 56>;
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big-endian-regs;
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};
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ohci@16f0000000400 {
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compatible = "cavium,octeon-6335-ohci","usb-ohci";
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reg = <0x16f00 0x00000400 0x0 0x100>;
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interrupts = <0 56>;
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big-endian-regs;
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};
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};
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