Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
30 lines
700 B
Plaintext
30 lines
700 B
Plaintext
* QEMU PVPANIC MMIO Configuration bindings
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QEMU's emulation / virtualization targets provide the following PVPANIC
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MMIO Configuration interface on the "virt" machine.
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type:
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- a read-write, 16-bit wide data register.
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QEMU exposes the data register to guests as memory mapped registers.
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Required properties:
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- compatible: "qemu,pvpanic-mmio".
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- reg: the MMIO region used by the device.
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* Bytes 0x0 Write panic event to the reg when guest OS panics.
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* Bytes 0x1 Reserved.
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Example:
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/ {
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#size-cells = <0x2>;
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#address-cells = <0x2>;
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pvpanic-mmio@9060000 {
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compatible = "qemu,pvpanic-mmio";
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reg = <0x0 0x9060000 0x0 0x2>;
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};
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};
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