Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
80 lines
1.8 KiB
YAML
80 lines
1.8 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/brcm,mdio-mux-iproc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: MDIO bus multiplexer found in Broadcom iProc based SoCs.
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maintainers:
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- Florian Fainelli <f.fainelli@gmail.com>
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description:
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This MDIO bus multiplexer defines buses that could be internal as well as
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external to SoCs and could accept MDIO transaction compatible to C-22 or
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C-45 Clause. When child bus is selected, one needs to select these two
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properties as well to generate desired MDIO transaction on appropriate bus.
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allOf:
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- $ref: /schemas/net/mdio-mux.yaml#
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properties:
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compatible:
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const: brcm,mdio-mux-iproc
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reg:
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maxItems: 1
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clocks:
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maxItems: 1
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description: core clock driving the MDIO block
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required:
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- compatible
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- reg
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unevaluatedProperties: false
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examples:
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- |
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mdio-mux@66020000 {
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compatible = "brcm,mdio-mux-iproc";
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reg = <0x66020000 0x250>;
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#address-cells = <1>;
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#size-cells = <0>;
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mdio@0 {
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reg = <0x0>;
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#address-cells = <1>;
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#size-cells = <0>;
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pci-phy@0 {
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compatible = "brcm,ns2-pcie-phy";
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reg = <0x0>;
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#phy-cells = <0>;
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};
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};
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mdio@7 {
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reg = <0x7>;
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#address-cells = <1>;
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#size-cells = <0>;
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pci-phy@0 {
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compatible = "brcm,ns2-pcie-phy";
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reg = <0x0>;
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#phy-cells = <0>;
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};
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};
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mdio@10 {
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reg = <0x10>;
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#address-cells = <1>;
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#size-cells = <0>;
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eth-phy@10 {
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reg = <0x10>;
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};
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};
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};
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