Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
31 lines
862 B
Plaintext
31 lines
862 B
Plaintext
TI CPSW Phy mode Selection Device Tree Bindings (DEPRECATED)
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-----------------------------------------------
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Required properties:
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- compatible : Should be "ti,am3352-cpsw-phy-sel" for am335x platform and
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"ti,dra7xx-cpsw-phy-sel" for dra7xx platform
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"ti,am43xx-cpsw-phy-sel" for am43xx platform
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- reg : physical base address and size of the cpsw
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registers map
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- reg-names : names of the register map given in "reg" node
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Optional properties:
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-rmii-clock-ext : If present, the driver will configure the RMII
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interface to external clock usage
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Examples:
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phy_sel: cpsw-phy-sel@44e10650 {
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compatible = "ti,am3352-cpsw-phy-sel";
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reg= <0x44e10650 0x4>;
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reg-names = "gmii-sel";
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};
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(or)
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phy_sel: cpsw-phy-sel@44e10650 {
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compatible = "ti,am3352-cpsw-phy-sel";
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reg= <0x44e10650 0x4>;
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reg-names = "gmii-sel";
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rmii-clock-ext;
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};
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