Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
26 lines
547 B
YAML
26 lines
547 B
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pci/cdns-pcie.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Cadence PCIe Core
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maintainers:
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- Tom Joseph <tjoseph@cadence.com>
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properties:
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phys:
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description:
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One per lane if more than one in the list. If only one PHY listed it must
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manage all lanes.
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minItems: 1
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maxItems: 16
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phy-names:
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items:
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- const: pcie-phy
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# FIXME: names when more than 1
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additionalProperties: true
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