Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
64 lines
1.5 KiB
YAML
64 lines
1.5 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/phy/st,stih407-usb2-phy.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: STMicroelectronics STiH407 USB PHY controller
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maintainers:
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- Patrice Chotard <patrice.chotard@foss.st.com>
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description:
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The USB picoPHY device is the PHY for both USB2 and USB3 host controllers
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(when controlling usb2/1.1 devices) available on STiH407 SoC family from
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STMicroelectronics.
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properties:
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compatible:
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const: st,stih407-usb2-phy
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st,syscfg:
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description: Phandle to the syscfg bank
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$ref: /schemas/types.yaml#/definitions/phandle-array
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items:
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- items:
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- description: phandle to syscfg
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- description: phyparam register offset
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- description: phyctrl register offset
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resets:
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items:
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- description: Phandle and reset specifier pair for the whole phy.
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- description: Phandle and reset specifier pair for the port.
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reset-names:
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items:
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- const: global
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- const: port
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"#phy-cells":
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const: 0
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required:
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- compatible
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- st,syscfg
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- resets
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- reset-names
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- "#phy-cells"
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/reset/stih407-resets.h>
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usb-phy {
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compatible = "st,stih407-usb2-phy";
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#phy-cells = <0>;
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st,syscfg = <&syscfg_core 0x100 0xf4>;
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resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
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<&picophyreset STIH407_PICOPHY0_RESET>;
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reset-names = "global", "port";
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};
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...
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