Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
94 lines
2.0 KiB
YAML
94 lines
2.0 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/soc/starfive/starfive,jh7110-syscon.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: StarFive JH7110 SoC system controller
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maintainers:
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- William Qiu <william.qiu@starfivetech.com>
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description:
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The StarFive JH7110 SoC system controller provides register information such
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as offset, mask and shift to configure related modules such as MMC and PCIe.
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properties:
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compatible:
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oneOf:
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- items:
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- const: starfive,jh7110-sys-syscon
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- const: syscon
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- const: simple-mfd
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- items:
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- enum:
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- starfive,jh7110-aon-syscon
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- starfive,jh7110-stg-syscon
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- const: syscon
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reg:
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maxItems: 1
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clock-controller:
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$ref: /schemas/clock/starfive,jh7110-pll.yaml#
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type: object
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"#power-domain-cells":
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const: 1
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required:
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- compatible
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- reg
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allOf:
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- if:
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properties:
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compatible:
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contains:
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const: starfive,jh7110-sys-syscon
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then:
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required:
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- clock-controller
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else:
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properties:
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clock-controller: false
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- if:
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properties:
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compatible:
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contains:
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const: starfive,jh7110-aon-syscon
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then:
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required:
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- "#power-domain-cells"
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else:
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properties:
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"#power-domain-cells": false
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additionalProperties: false
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examples:
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- |
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syscon@10240000 {
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compatible = "starfive,jh7110-stg-syscon", "syscon";
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reg = <0x10240000 0x1000>;
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};
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syscon@13030000 {
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compatible = "starfive,jh7110-sys-syscon", "syscon", "simple-mfd";
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reg = <0x13030000 0x1000>;
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clock-controller {
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compatible = "starfive,jh7110-pll";
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clocks = <&osc>;
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#clock-cells = <1>;
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};
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};
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syscon@17010000 {
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compatible = "starfive,jh7110-aon-syscon", "syscon";
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reg = <0x17010000 0x1000>;
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#power-domain-cells = <1>;
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};
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...
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