Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
29 lines
971 B
Plaintext
29 lines
971 B
Plaintext
Cavium SuperSpeed DWC3 USB SoC controller
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Required properties:
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- compatible: Should contain "cavium,octeon-7130-usb-uctl"
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Required child node:
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A child node must exist to represent the core DWC3 IP block. The name of
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the node is not important. The content of the node is defined in dwc3.txt.
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Example device node:
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uctl@1180069000000 {
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compatible = "cavium,octeon-7130-usb-uctl";
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reg = <0x00011800 0x69000000 0x00000000 0x00000100>;
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ranges;
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#address-cells = <0x00000002>;
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#size-cells = <0x00000002>;
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refclk-frequency = <0x05f5e100>;
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refclk-type-ss = "dlmc_ref_clk0";
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refclk-type-hs = "dlmc_ref_clk0";
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power = <0x00000002 0x00000002 0x00000001>;
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xhci@1690000000000 {
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compatible = "cavium,octeon-7130-xhci", "snps,dwc3";
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reg = <0x00016900 0x00000000 0x00000010 0x00000000>;
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interrupt-parent = <0x00000010>;
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interrupts = <0x00000009 0x00000004>;
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};
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};
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