Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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1.1 KiB
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45 lines
1.1 KiB
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======================
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Kernel driver i2c-ismt
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======================
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Supported adapters:
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* Intel S12xx series SOCs
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Authors:
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Bill Brown <bill.e.brown@intel.com>
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Module Parameters
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-----------------
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* bus_speed (unsigned int)
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Allows changing of the bus speed. Normally, the bus speed is set by the BIOS
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and never needs to be changed. However, some SMBus analyzers are too slow for
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monitoring the bus during debug, thus the need for this module parameter.
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Specify the bus speed in kHz.
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Available bus frequency settings:
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==== =========
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0 no change
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80 kHz
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100 kHz
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400 kHz
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1000 kHz
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==== =========
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Description
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-----------
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The S12xx series of SOCs have a pair of integrated SMBus 2.0 controllers
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targeted primarily at the microserver and storage markets.
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The S12xx series contain a pair of PCI functions. An output of lspci will show
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something similar to the following::
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00:13.0 System peripheral: Intel Corporation Centerton SMBus 2.0 Controller 0
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00:13.1 System peripheral: Intel Corporation Centerton SMBus 2.0 Controller 1
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