Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
45 lines
937 B
Devicetree
45 lines
937 B
Devicetree
// SPDX-License-Identifier: GPL-2.0-only
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// Copyright (C) 2016 Jamie Lentin <jm@lentin.co.uk>
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#include "orion5x.dtsi"
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/ {
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compatible = "marvell,orion5x-88f5181", "marvell,orion5x";
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soc {
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compatible = "marvell,orion5x-88f5181-mbus", "simple-bus";
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internal-regs {
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pinctrl: pinctrl@10000 {
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compatible = "marvell,88f5181-pinctrl";
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reg = <0x10000 0x8>, <0x10050 0x4>;
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};
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core_clk: core-clocks@10030 {
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compatible = "marvell,mv88f5181-core-clock";
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reg = <0x10010 0x4>;
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#clock-cells = <1>;
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};
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mbusc: mbus-controller@20000 {
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compatible = "marvell,mbus-controller";
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reg = <0x20000 0x100>, <0x1500 0x20>;
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};
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};
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};
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};
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&pinctrl {
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pmx_ge: pmx-ge {
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marvell,pins = "mpp8", "mpp9", "mpp10", "mpp11",
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"mpp12", "mpp13", "mpp14", "mpp15",
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"mpp16", "mpp17", "mpp18", "mpp19";
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marvell,function = "ge";
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};
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};
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ð {
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pinctrl-0 = <&pmx_ge>;
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pinctrl-names = "default";
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};
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