Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
148 lines
2.2 KiB
Devicetree
148 lines
2.2 KiB
Devicetree
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2017-2018 MediaTek Inc.
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* Author: Sean Wang <sean.wang@mediatek.com>
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*
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*/
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/dts-v1/;
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#include <dt-bindings/power/mt7623a-power.h>
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#include "mt7623.dtsi"
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&afe {
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power-domains = <&scpsys MT7623A_POWER_DOMAIN_IFR_MSC>;
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};
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&crypto {
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power-domains = <&scpsys MT7623A_POWER_DOMAIN_ETH>;
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};
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&gmac0 {
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status = "okay";
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phy-mode = "trgmii";
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fixed-link {
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speed = <1000>;
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full-duplex;
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pause;
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};
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};
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&gmac1 {
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status = "okay";
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phy-mode = "rgmii";
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fixed-link {
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speed = <1000>;
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full-duplex;
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pause;
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};
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};
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ð {
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status = "okay";
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power-domains = <&scpsys MT7623A_POWER_DOMAIN_ETH>;
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mdio: mdio-bus {
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#address-cells = <1>;
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#size-cells = <0>;
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switch0: switch@1f {
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compatible = "mediatek,mt7530";
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reg = <0x1f>;
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mediatek,mcm;
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resets = <ðsys MT2701_ETHSYS_MCM_RST>;
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reset-names = "mcm";
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core-supply = <&mt6323_vpa_reg>;
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io-supply = <&mt6323_vemc3v3_reg>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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status = "disabled";
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reg = <0>;
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label = "swp0";
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};
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port@1 {
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status = "disabled";
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reg = <1>;
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label = "swp1";
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};
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port@2 {
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status = "disabled";
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reg = <2>;
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label = "swp2";
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};
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port@3 {
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status = "disabled";
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reg = <3>;
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label = "swp3";
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};
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port@4 {
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status = "disabled";
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reg = <4>;
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label = "swp4";
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};
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port@5 {
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reg = <5>;
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label = "cpu";
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ethernet = <&gmac1>;
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phy-mode = "rgmii";
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fixed-link {
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speed = <1000>;
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full-duplex;
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pause;
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};
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};
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port@6 {
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reg = <6>;
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label = "cpu";
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ethernet = <&gmac0>;
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phy-mode = "trgmii";
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fixed-link {
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speed = <1000>;
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full-duplex;
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pause;
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};
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};
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};
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};
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};
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};
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&nandc {
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power-domains = <&scpsys MT7623A_POWER_DOMAIN_IFR_MSC>;
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};
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&pcie {
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power-domains = <&scpsys MT7623A_POWER_DOMAIN_HIF>;
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};
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&scpsys {
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compatible = "mediatek,mt7623a-scpsys";
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clocks = <&topckgen CLK_TOP_ETHIF_SEL>;
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clock-names = "ethif";
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};
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&usb0 {
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power-domains = <&scpsys MT7623A_POWER_DOMAIN_IFR_MSC>;
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};
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&usb1 {
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power-domains = <&scpsys MT7623A_POWER_DOMAIN_HIF>;
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};
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&usb2 {
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power-domains = <&scpsys MT7623A_POWER_DOMAIN_HIF>;
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};
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