Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
25 lines
450 B
Devicetree
25 lines
450 B
Devicetree
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* DTS file for SPEAr320s SoC
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*
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* Copyright 2021 Herve Codina <herve.codina@bootlin.com>
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*/
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/include/ "spear320.dtsi"
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/ {
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ahb {
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apb {
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gpiopinctrl: gpio@b3000000 {
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/*
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* The "RM0321 SPEAr320s address and map
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* registers" document mentions interrupt 6
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* (NPGIO_INTR) for the PL_GPIO interrupt.
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*/
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interrupts = <6>;
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interrupt-parent = <&shirq>;
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};
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};
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};
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};
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