Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
35 lines
821 B
Devicetree
35 lines
821 B
Devicetree
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
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/*
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* Copyright (C) STMicroelectronics 2021 - All Rights Reserved
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* Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
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*/
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#include "stm32mp133.dtsi"
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/ {
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soc {
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dcmipp: dcmipp@5a000000 {
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compatible = "st,stm32mp13-dcmipp";
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reg = <0x5a000000 0x400>;
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interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
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resets = <&rcc DCMIPP_R>;
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clocks = <&rcc DCMIPP_K>;
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status = "disabled";
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port {
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};
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};
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ltdc: display-controller@5a001000 {
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compatible = "st,stm32-ltdc";
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reg = <0x5a001000 0x400>;
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interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&rcc LTDC_PX>;
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clock-names = "lcd";
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resets = <&scmi_reset RST_SCMI_LTDC>;
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status = "disabled";
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};
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};
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};
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