Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
634 lines
18 KiB
Devicetree
634 lines
18 KiB
Devicetree
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2021-2025 TQ-Systems GmbH <linux@ew.tq-group.com>, D-82229 Seefeld, Germany.
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* Authors: Gregor Herburger, Matthias Schiffer
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*
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* Based on:
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* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
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*/
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/dts-v1/;
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include "am335x-tqma335x.dtsi"
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/ {
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model = "TQ-Systems TQMa335x[L] SoM on MBa335x carrier board";
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compatible = "tq,tqma3359-mba335x", "tq,tqma3359", "ti,am33xx";
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chassis-type = "embedded";
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chosen {
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stdout-path = &uart4;
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};
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backlight: backlight {
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compatible = "pwm-backlight";
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brightness-levels = <0 58 61 66 75 90 125 170 255>;
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default-brightness-level = <7>;
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enable-gpios = <&expander1 4 GPIO_ACTIVE_HIGH>;
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power-supply = <®_mba335x_12v>;
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status = "disabled";
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};
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gpio-keys {
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compatible = "gpio-keys";
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button-s5 {
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label = "S5";
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linux,code = <BTN_0>;
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gpios = <&expander2 0 GPIO_ACTIVE_LOW>;
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};
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button-s6 {
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label = "S6";
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linux,code = <BTN_1>;
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gpios = <&expander2 1 GPIO_ACTIVE_LOW>;
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};
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button-s7 {
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label = "S7";
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linux,code = <BTN_2>;
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gpios = <&expander2 2 GPIO_ACTIVE_LOW>;
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};
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};
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reg_mba335x_12v: regulator-12v {
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compatible = "regulator-fixed";
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regulator-name = "MBa335x-V12";
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regulator-min-microvolt = <12000000>;
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regulator-max-microvolt = <12000000>;
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regulator-always-on;
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};
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vcc3v3: regulator-vcc3v3 {
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compatible = "regulator-fixed";
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regulator-name = "VCC3V3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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sound {
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compatible = "simple-audio-card";
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simple-audio-card,name = "tqm-tlv320aic32";
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simple-audio-card,widgets =
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"Headphone", "Headphone Jack",
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"Line", "Line In",
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"Line", "Line Out",
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"Microphone", "Mic Jack";
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simple-audio-card,routing =
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"Headphone Jack", "HPL",
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"Headphone Jack", "HPR",
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"Line Out", "LOL",
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"Line Out", "LOR",
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"IN3_L", "Mic Jack",
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"Mic Jack", "Mic Bias",
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"Line In", "IN1_L",
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"Line In", "IN1_R";
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simple-audio-card,format = "i2s";
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simple-audio-card,bitclock-master = <&sound_master>;
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simple-audio-card,frame-master = <&sound_master>;
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simple-audio-card,cpu {
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sound-dai = <&mcasp0>;
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#sound-dai-cells = <0>;
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system-clock-direction-out;
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};
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sound_master: simple-audio-card,codec {
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sound-dai = <&tlv320aic32x4>;
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system-clock-frequency = <24000000>;
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system-clock-direction-out;
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};
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};
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};
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&am33xx_pinmux {
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codec_pins: codec-pins {
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pinctrl-single,pins = <
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/* xdma_event_intr0.clkout1 */
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AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT, MUX_MODE3)
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>;
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};
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cpsw_default_pins: cpsw-default-pins {
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pinctrl-single,pins = <
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/* Port 1 */
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/* mii1_tx_en.rgmii1_tctl */
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AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
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/* mii1_rx_dv.rgmii1_rctl */
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AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE2)
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/* mii1_txd3.rgmii1_td3 */
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
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/* mii1_txd2.rgmii1_td2 */
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
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/* mii1_txd1.rgmii1_td1 */
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
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/* mii1_txd0.rgmii1_td0 */
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
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/* mii1_tx_clk.rgmii1_tclk */
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AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
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/* mii1_rx_clk.rgmii1_rclk */
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AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE2)
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/* mii1_rxd3.rgmii1_rd3 */
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE2)
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/* mii1_rxd2.rgmii1_rd2 */
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE2)
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/* mii1_rxd1.rgmii1_rd1 */
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE2)
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/* mii1_rxd0.rgmii1_rd0 */
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE2)
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/* Port 2 */
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/* gpmc_a0.rgmii2_tctl */
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AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
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/* gpmc_a1.rgmii2_rctl */
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AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLDOWN, MUX_MODE2)
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/* gpmc_a2.rgmii2_td3 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
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/* gpmc_a3.rgmii2_td2 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_A3, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
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/* gpmc_a4.rgmii2_td1 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
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/* gpmc_a5.rgmii2_td0 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
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/* gpmc_a6.rgmii2_tclk */
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AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
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/* gpmc_a7.rgmii2_rclk */
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AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_INPUT_PULLDOWN, MUX_MODE2)
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/* gpmc_a8.rgmii2_rd3 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_INPUT_PULLDOWN, MUX_MODE2)
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/* gpmc_a9.rgmii2_rd2 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT_PULLDOWN, MUX_MODE2)
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/* gpmc_a10.rgmii2_rd1 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLDOWN, MUX_MODE2)
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/* gpmc_a11.rgmii2_rd0 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLDOWN, MUX_MODE2)
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>;
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};
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cpsw_sleep_pins: cpsw-sleep-pins {
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pinctrl-single,pins = <
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/* Port 1 */
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AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
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/* Port 2 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_GPMC_A3, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLDOWN, MUX_MODE7)
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>;
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};
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davinci_mdio_default_pins: davinci_mdio-default-pins {
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pinctrl-single,pins = <
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/* mdio.mdio_data */
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AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0)
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/* mdc.mdio_clk */
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AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0)
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>;
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};
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davinci_mdio_sleep_pins: davinci_mdio-sleep-pins {
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pinctrl-single,pins = <
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/* mdio.mdio_data */
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AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP, MUX_MODE7)
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/* mdc.mdio_clk */
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AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLUP, MUX_MODE7)
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>;
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};
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davinci_mdio_phy0_pins: davinci_mdio-phy0-pins {
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pinctrl-single,pins = <
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/* usb0_drvvbus.gpio0_18 - PHY interrupt */
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AM33XX_PADCONF(AM335X_PIN_USB0_DRVVBUS, PIN_INPUT, MUX_MODE7)
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>;
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};
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davinci_mdio_phy1_pins: davinci_mdio-phy1-pins {
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pinctrl-single,pins = <
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/* gpmc_csn0.gpio1_29 - PHY interrupt */
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AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_INPUT, MUX_MODE7)
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>;
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};
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dcan0_pins: dcan0-pins {
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pinctrl-single,pins = <
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/* uart1_ctsn.d_can0_tx */
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AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
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/* uart1_rtsn.d_can0_rx */
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AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT_PULLUP, MUX_MODE2)
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>;
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};
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dcan1_pins: dcan1-pins {
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pinctrl-single,pins = <
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/* uart0_ctsn.d_can1_tx */
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AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
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/* uart0_rtsn.d_can1_rx */
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AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT_PULLUP, MUX_MODE2)
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>;
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};
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ecap2_pins: ecap2-pins {
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pinctrl-single,pins = <
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/* mcasp0_ahclkr.ecap2_in_pwm2_out */
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AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKR, PIN_OUTPUT, MUX_MODE4)
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>;
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};
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expander1_pins: expander1-pins {
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pinctrl-single,pins = <
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/* gpmc_csn3.gpio2_0 - interrupt */
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AM33XX_PADCONF(AM335X_PIN_GPMC_CSN3, PIN_INPUT_PULLUP, MUX_MODE7 )
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>;
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};
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expander2_pins: expander2-pins {
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pinctrl-single,pins = <
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/* gpmc_ben1.gpio1_28 - interrupt */
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AM33XX_PADCONF(AM335X_PIN_GPMC_BEN1, PIN_INPUT_PULLUP, MUX_MODE7)
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>;
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};
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i2c1_pins: i2c1-pins {
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pinctrl-single,pins = <
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/* uart1_rxd.i2c1_sda */
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AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLUP, MUX_MODE3)
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/* uart1_txd.i2c1_scl */
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AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_INPUT_PULLUP, MUX_MODE3)
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>;
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};
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lcd_pins: lcd-pins {
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pinctrl-single,pins = <
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/* gpmc_ad8.lcd_data23 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_OUTPUT, MUX_MODE1)
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/* gpmc_ad9.lcd_data22 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_OUTPUT, MUX_MODE1)
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/* gpmc_ad10.lcd_data21 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_OUTPUT, MUX_MODE1)
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/* gpmc_ad11.lcd_data20 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_OUTPUT, MUX_MODE1)
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/* gpmc_ad12.lcd_data19 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_OUTPUT, MUX_MODE1)
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/* gpmc_ad13.lcd_data18 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_OUTPUT, MUX_MODE1)
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/* gpmc_ad14.lcd_data17 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_OUTPUT, MUX_MODE1)
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/* gpmc_ad15.lcd_data16 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_OUTPUT, MUX_MODE1)
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/* lcd_data0.lcd_data0 */
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0)
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/* lcd_data1.lcd_data1 */
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0)
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/* lcd_data2.lcd_data2 */
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0)
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/* lcd_data3.lcd_data3 */
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE0)
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/* lcd_data4.lcd_data4 */
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE0)
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/* lcd_data5.lcd_data5 */
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE0)
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/* lcd_data6.lcd_data6 */
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE0)
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/* lcd_data7.lcd_data7 */
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE0)
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/* lcd_data8.lcd_data8 */
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE0)
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/* lcd_data9.lcd_data9 */
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE0)
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/* lcd_data10.lcd_data10 */
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE0)
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/* lcd_data11.lcd_data11 */
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE0)
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/* lcd_data12.lcd_data12 */
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE0)
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/* lcd_data13.lcd_data13 */
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE0)
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/* lcd_data14.lcd_data14 */
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE0)
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/* lcd_data15.lcd_data15 */
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE0)
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/* lcd_vsync.lcd_vsync */
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AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT, MUX_MODE0)
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/* lcd_hsync.lcd_hsync */
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AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT, MUX_MODE0)
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/* lcd_pclk.lcd_pclk */
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AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT, MUX_MODE0)
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/* lcd_ac_bias_en.lcd_ac_bias_en */
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AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT, MUX_MODE0)
|
|
>;
|
|
};
|
|
|
|
mcasp0_pins: mcasp0-pins {
|
|
pinctrl-single,pins = <
|
|
/* mcasp0_fsx.mcasp0_fsx */
|
|
AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_INPUT_PULLDOWN, MUX_MODE0)
|
|
/* mcasp0_aclkx.mcasp0_aclkx*/
|
|
AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_INPUT_PULLDOWN, MUX_MODE0)
|
|
/* mcasp0_axr0.mcasp0_axr0 */
|
|
AM33XX_PADCONF(AM335X_PIN_MCASP0_AXR0, PIN_INPUT_PULLDOWN, MUX_MODE0)
|
|
/* mcasp0_axr1.mcasp0_axr1 */
|
|
AM33XX_PADCONF(AM335X_PIN_MCASP0_AXR1, PIN_INPUT_PULLDOWN, MUX_MODE0)
|
|
/* mcasp0_aclkr.mcasp0_aclkr */
|
|
AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKR, PIN_INPUT_PULLDOWN, MUX_MODE0)
|
|
/* mcasp0_fsr.mcasp0_fsr */
|
|
AM33XX_PADCONF(AM335X_PIN_MCASP0_FSR, PIN_INPUT_PULLDOWN, MUX_MODE0)
|
|
>;
|
|
};
|
|
|
|
mmc1_pins: mmc1-pins {
|
|
pinctrl-single,pins = <
|
|
/* mmc0_dat3.mmc0_dat3 */
|
|
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
|
|
/* mmc0_dat2.mmc0_dat2 */
|
|
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
|
|
/* mmc0_dat1.mmc0_dat1 */
|
|
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0)
|
|
/* mmc0_dat0.mmc0_dat0 */
|
|
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0)
|
|
/* mmc0_clk.mmc0_clk */
|
|
AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
|
|
/* mmc0_cmd.mmc0_cmd */
|
|
AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
|
|
>;
|
|
};
|
|
|
|
polytouch_pins: polytouch-pins {
|
|
pinctrl-single,pins = <
|
|
/* gpmc_clk.gpio2_1 - touch interrupt */
|
|
AM33XX_PADCONF(AM335X_PIN_GPMC_CLK, PIN_INPUT_PULLUP, MUX_MODE7)
|
|
>;
|
|
};
|
|
|
|
uart0_pins: uart0-pins {
|
|
pinctrl-single,pins = <
|
|
/* uart0_rxd.uart0_rxd */
|
|
AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
|
|
/* uart0_txd.uart0_txd */
|
|
AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
|
|
>;
|
|
};
|
|
|
|
uart3_pins: uart3-pins {
|
|
pinctrl-single,pins = <
|
|
/* spi0_cs1.uart3_rxd */
|
|
AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT_PULLUP, MUX_MODE1)
|
|
/* ecap0_in_pwm0_out.uart3_txd */
|
|
AM33XX_PADCONF(AM335X_PIN_ECAP0_IN_PWM0_OUT, PIN_OUTPUT_PULLDOWN, MUX_MODE1)
|
|
>;
|
|
};
|
|
|
|
uart4_pins: uart4-pins {
|
|
pinctrl-single,pins = <
|
|
/* gpmc_wait0.uart4_rxd */
|
|
AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE6)
|
|
/* gpmc_wpn.uart4_txd */
|
|
AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_OUTPUT_PULLDOWN, MUX_MODE6)
|
|
>;
|
|
};
|
|
};
|
|
|
|
&cpsw_port1 {
|
|
phy-handle = <ðphy0>;
|
|
phy-mode = "rgmii-id";
|
|
ti,dual-emac-pvid = <1>;
|
|
};
|
|
|
|
&cpsw_port2 {
|
|
phy-handle = <ðphy1>;
|
|
phy-mode = "rgmii-id";
|
|
ti,dual-emac-pvid = <2>;
|
|
};
|
|
|
|
&davinci_mdio_sw {
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <&davinci_mdio_default_pins>;
|
|
pinctrl-1 = <&davinci_mdio_sleep_pins>;
|
|
status = "okay";
|
|
|
|
ethphy0: ethernet-phy@0 {
|
|
compatible = "ethernet-phy-ieee802.3-c22";
|
|
reg = <0>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&davinci_mdio_phy0_pins>;
|
|
interrupt-parent = <&gpio0>;
|
|
interrupts = <18 IRQ_TYPE_LEVEL_LOW>;
|
|
rxc-skew-ps = <1860>;
|
|
rxd0-skew-ps = <0>;
|
|
rxd1-skew-ps = <0>;
|
|
rxd2-skew-ps = <0>;
|
|
rxd3-skew-ps = <0>;
|
|
rxdv-skew-ps = <0>;
|
|
txc-skew-ps = <1860>;
|
|
txd0-skew-ps = <0>;
|
|
txd1-skew-ps = <0>;
|
|
txd2-skew-ps = <0>;
|
|
txd3-skew-ps = <0>;
|
|
txen-skew-ps = <0>;
|
|
};
|
|
|
|
ethphy1: ethernet-phy@1 {
|
|
compatible = "ethernet-phy-ieee802.3-c22";
|
|
reg = <1>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&davinci_mdio_phy1_pins>;
|
|
interrupt-parent = <&gpio1>;
|
|
interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
|
|
rxc-skew-ps = <1860>;
|
|
rxd0-skew-ps = <0>;
|
|
rxd1-skew-ps = <0>;
|
|
rxd2-skew-ps = <0>;
|
|
rxd3-skew-ps = <0>;
|
|
rxdv-skew-ps = <0>;
|
|
txc-skew-ps = <1860>;
|
|
txd0-skew-ps = <0>;
|
|
txd1-skew-ps = <0>;
|
|
txd2-skew-ps = <0>;
|
|
txd3-skew-ps = <0>;
|
|
txen-skew-ps = <0>;
|
|
};
|
|
};
|
|
|
|
&dcan0 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&dcan0_pins>;
|
|
status = "okay";
|
|
};
|
|
|
|
&dcan1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&dcan1_pins>;
|
|
status = "okay";
|
|
};
|
|
|
|
&ds1339 {
|
|
interrupt-parent = <&expander2>;
|
|
interrupts = <3 IRQ_TYPE_EDGE_RISING>;
|
|
};
|
|
|
|
&ecap2 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&ecap2_pins>;
|
|
};
|
|
|
|
&i2c0 {
|
|
tlv320aic32x4: audio-codec@18 {
|
|
compatible = "ti,tlv320aic32x4";
|
|
reg = <0x18>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&codec_pins>;
|
|
clocks = <&clk_24mhz>;
|
|
clock-names = "mclk";
|
|
iov-supply = <&vcc3v3>;
|
|
ldoin-supply = <&vcc3v3>;
|
|
#sound-dai-cells = <0>;
|
|
};
|
|
|
|
jc42_2: temperature-sensor@19 {
|
|
compatible = "nxp,se97b", "jedec,jc-42.4-temp";
|
|
reg = <0x19>;
|
|
};
|
|
|
|
expander1: gpio@20 {
|
|
compatible = "nxp,pca9554";
|
|
reg = <0x20>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&expander1_pins>;
|
|
vcc-supply = <&vcc3v3>;
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
interrupt-parent = <&gpio2>;
|
|
interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
|
|
};
|
|
|
|
expander2: gpio@21 {
|
|
compatible = "nxp,pca9554";
|
|
reg = <0x21>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&expander2_pins>;
|
|
vcc-supply = <&vcc3v3>;
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
interrupt-parent = <&gpio1>;
|
|
interrupts = <28 IRQ_TYPE_EDGE_FALLING>;
|
|
};
|
|
|
|
eeprom3: eeprom@51 {
|
|
compatible = "nxp,se97b", "atmel,24c02";
|
|
reg = <0x51>;
|
|
pagesize = <16>;
|
|
vcc-supply = <&vcc3v3>;
|
|
};
|
|
};
|
|
|
|
&i2c1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2c1_pins>;
|
|
clock-frequency = <100000>;
|
|
status = "okay";
|
|
};
|
|
|
|
&lcdc {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&lcd_pins>;
|
|
blue-and-red-wiring = "crossed";
|
|
};
|
|
|
|
&mac_sw {
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <&cpsw_default_pins>;
|
|
pinctrl-1 = <&cpsw_sleep_pins>;
|
|
status = "okay";
|
|
};
|
|
|
|
&mcasp0 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&mcasp0_pins>;
|
|
#sound-dai-cells = <0>;
|
|
op-mode = <0>;
|
|
tdm-slots = <2>;
|
|
/* 16 serializer */
|
|
serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
|
|
2 1 0 0
|
|
0 0 0 0
|
|
0 0 0 0
|
|
0 0 0 0
|
|
>;
|
|
tx-num-evt = <32>;
|
|
rx-num-evt = <32>;
|
|
status = "okay";
|
|
};
|
|
|
|
&mmc1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&mmc1_pins>;
|
|
vmmc-supply = <&vcc3v3>;
|
|
bus-width = <4>;
|
|
no-1-8-v;
|
|
no-mmc;
|
|
no-sdio;
|
|
status = "okay";
|
|
};
|
|
|
|
&tps {
|
|
interrupt-parent = <&expander2>;
|
|
interrupts = <4 IRQ_TYPE_EDGE_RISING>;
|
|
};
|
|
|
|
&uart0 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&uart0_pins>;
|
|
status = "okay";
|
|
};
|
|
|
|
&uart3 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&uart3_pins>;
|
|
status = "okay";
|
|
};
|
|
|
|
&uart4 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&uart4_pins>;
|
|
status = "okay";
|
|
};
|
|
|
|
&usb0 {
|
|
dr_mode = "host";
|
|
};
|
|
|
|
&usb1 {
|
|
/* Should be "otg", but role switching currently doesn't work */
|
|
dr_mode = "peripheral";
|
|
};
|
|
|
|
/* SOM supply */
|
|
&vcc3v3in {
|
|
vin-supply = <&vcc3v3>;
|
|
};
|