Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
100 lines
2.2 KiB
C
100 lines
2.2 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Utility to set the DAVINCI MUX register from a table in mux.h
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*
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* Author: Vladimir Barinov, MontaVista Software, Inc. <source@mvista.com>
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*
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* Based on linux/arch/arm/plat-omap/mux.c:
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* Copyright (C) 2003 - 2005 Nokia Corporation
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*
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* Written by Tony Lindgren
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*
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* 2007 (c) MontaVista Software, Inc.
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*
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* Copyright (C) 2008 Texas Instruments.
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/spinlock.h>
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#include "mux.h"
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#include "common.h"
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static void __iomem *pinmux_base;
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/*
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* Sets the DAVINCI MUX register based on the table
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*/
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int davinci_cfg_reg(const unsigned long index)
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{
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static DEFINE_SPINLOCK(mux_spin_lock);
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struct davinci_soc_info *soc_info = &davinci_soc_info;
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unsigned long flags;
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const struct mux_config *cfg;
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unsigned int reg_orig = 0, reg = 0;
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unsigned int mask, warn = 0;
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if (WARN_ON(!soc_info->pinmux_pins))
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return -ENODEV;
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if (!pinmux_base) {
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pinmux_base = ioremap(soc_info->pinmux_base, SZ_4K);
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if (WARN_ON(!pinmux_base))
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return -ENOMEM;
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}
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if (index >= soc_info->pinmux_pins_num) {
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pr_err("Invalid pin mux index: %lu (%lu)\n",
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index, soc_info->pinmux_pins_num);
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dump_stack();
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return -ENODEV;
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}
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cfg = &soc_info->pinmux_pins[index];
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if (cfg->name == NULL) {
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pr_err("No entry for the specified index\n");
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return -ENODEV;
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}
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/* Update the mux register in question */
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if (cfg->mask) {
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unsigned tmp1, tmp2;
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spin_lock_irqsave(&mux_spin_lock, flags);
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reg_orig = __raw_readl(pinmux_base + cfg->mux_reg);
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mask = (cfg->mask << cfg->mask_offset);
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tmp1 = reg_orig & mask;
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reg = reg_orig & ~mask;
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tmp2 = (cfg->mode << cfg->mask_offset);
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reg |= tmp2;
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if (tmp1 != tmp2)
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warn = 1;
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__raw_writel(reg, pinmux_base + cfg->mux_reg);
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spin_unlock_irqrestore(&mux_spin_lock, flags);
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}
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if (warn) {
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#ifdef CONFIG_DAVINCI_MUX_WARNINGS
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pr_warn("initialized %s\n", cfg->name);
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#endif
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}
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#ifdef CONFIG_DAVINCI_MUX_DEBUG
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if (cfg->debug || warn) {
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pr_warn("Setting register %s\n", cfg->name);
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pr_warn(" %s (0x%08x) = 0x%08x -> 0x%08x\n",
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cfg->mux_reg_name, cfg->mux_reg, reg_orig, reg);
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}
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#endif
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return 0;
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}
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