Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
55 lines
1.2 KiB
C
55 lines
1.2 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* r8a7778 processor support
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*
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* Copyright (C) 2013 Renesas Solutions Corp.
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* Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
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* Copyright (C) 2013 Cogent Embedded, Inc.
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*/
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#include <linux/io.h>
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#include <linux/irqchip.h>
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#include <asm/mach/arch.h>
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#include "common.h"
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#define HPBREG_BASE 0xfe700000
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#define INT2SMSKCR0 0x82288 /* 0xfe782288 */
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#define INT2SMSKCR1 0x8228c /* 0xfe78228c */
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#define INT2NTSR0 0x00018 /* 0xfe700018 */
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#define INT2NTSR1 0x0002c /* 0xfe70002c */
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static void __init r8a7778_init_irq_dt(void)
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{
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void __iomem *base = ioremap(HPBREG_BASE, 0x00100000);
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BUG_ON(!base);
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irqchip_init();
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/* route all interrupts to ARM */
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writel(0x73ffffff, base + INT2NTSR0);
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writel(0xffffffff, base + INT2NTSR1);
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/* unmask all known interrupts in INTCS2 */
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writel(0x08330773, base + INT2SMSKCR0);
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writel(0x00311110, base + INT2SMSKCR1);
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iounmap(base);
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}
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static const char *const r8a7778_compat_dt[] __initconst = {
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"renesas,r8a7778",
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NULL
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};
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DT_MACHINE_START(R8A7778_DT, "Generic R8A7778 (Flattened Device Tree)")
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.init_early = shmobile_init_delay,
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.init_irq = r8a7778_init_irq_dt,
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.init_late = shmobile_init_late,
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.dt_compat = r8a7778_compat_dt,
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MACHINE_END
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