Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
48 lines
826 B
Devicetree
48 lines
826 B
Devicetree
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2020 Marvell International Ltd.
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*/
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#include "cn9130-crb.dtsi"
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/ {
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model = "Marvell Armada CN9130-CRB-B";
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};
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&cp0_pcie0 {
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status = "okay";
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num-lanes = <1>;
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num-viewport = <8>;
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/* Generic PHY, providing serdes lanes */
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phys = <&cp0_comphy0 0>;
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iommu-map =
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<0x0 &smmu 0x480 0x20>,
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<0x100 &smmu 0x4a0 0x20>,
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<0x200 &smmu 0x4c0 0x20>;
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iommu-map-mask = <0x031f>;
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};
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&cp0_sata0 {
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status = "okay";
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sata-port@0 {
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status = "okay";
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/* Generic PHY, providing serdes lanes */
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phys = <&cp0_comphy2 0>;
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status = "okay";
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};
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};
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&cp0_usb3_0 {
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status = "okay";
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usb-phy = <&cp0_usb3_0_phy0>;
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phy-names = "usb";
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phys = <&cp0_comphy1 0>;
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};
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&cp0_usb3_1 {
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status = "okay";
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usb-phy = <&cp0_usb3_0_phy1>;
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phy-names = "usb";
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phys = <&cp0_comphy3 1>;
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};
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