Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
67 lines
1.0 KiB
Devicetree
67 lines
1.0 KiB
Devicetree
// SPDX-License-Identifier: GPL-2.0
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/*
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* Device Tree Source for the Silicon Linux sub board for CAT874 (CAT875)
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*
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* Copyright (C) 2019 Renesas Electronics Corp.
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*/
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/ {
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model = "Silicon Linux sub board for CAT874 (CAT875)";
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aliases {
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ethernet0 = &avb;
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};
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};
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&avb {
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pinctrl-0 = <&avb_pins>;
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pinctrl-names = "default";
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renesas,no-ether-link;
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phy-handle = <&phy0>;
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phy-mode = "rgmii-id";
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status = "okay";
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phy0: ethernet-phy@0 {
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compatible = "ethernet-phy-id001c.c915",
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"ethernet-phy-ieee802.3-c22";
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reg = <0>;
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interrupts-extended = <&gpio2 21 IRQ_TYPE_LEVEL_LOW>;
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reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
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};
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};
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&can0 {
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pinctrl-0 = <&can0_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&can1 {
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pinctrl-0 = <&can1_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&pciec0 {
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status = "okay";
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};
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&pfc {
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avb_pins: avb {
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mux {
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groups = "avb_mii";
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function = "avb";
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};
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};
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can0_pins: can0 {
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groups = "can0_data";
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function = "can0";
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};
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can1_pins: can1 {
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groups = "can1_data";
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function = "can1";
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};
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};
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