Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
47 lines
1.2 KiB
Devicetree
47 lines
1.2 KiB
Devicetree
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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/*
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* Device Tree Source for the RZ/G2L SMARC EVK board
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*
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* Copyright (C) 2021 Renesas Electronics Corp.
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*/
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/dts-v1/;
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/* Enable SCIF2 (SER0) on PMOD1 (CN7) */
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#define PMOD1_SER0 1
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/*
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* To enable MTU3a PWM on PMOD0,
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* Disable PMOD1_SER0 by setting "#define PMOD1_SER0 0" above and
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* enable PMOD_MTU3 by setting "#define PMOD_MTU3 1" below.
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*/
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#define PMOD_MTU3 0
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#if (PMOD_MTU3 && PMOD1_SER0)
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#error "Cannot set as PMOD_MTU3 and PMOD1_SER0 are mutually exclusive "
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#endif
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#define MTU3_COUNTER_Z_PHASE_SIGNAL 0
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#if (!PMOD_MTU3 && MTU3_COUNTER_Z_PHASE_SIGNAL)
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#error "Cannot set 1 to MTU3_COUNTER_Z_PHASE_SIGNAL as PMOD_MTU3=0"
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#endif
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/*
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* To enable the GPT pins GTIOC4A(PMOD0_PIN7) and GTIOC4B(PMOD0_PIN10) on the
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* PMOD0 connector (J1), enable PMOD0_GPT by setting "#define PMOD0_GPT 1"
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* below.
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*/
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#define PMOD0_GPT 0
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#include "r9a07g044l2.dtsi"
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#include "rzg2l-smarc-som.dtsi"
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#include "rzg2l-smarc-pinfunction.dtsi"
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#include "rz-smarc-common.dtsi"
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#include "rzg2l-smarc.dtsi"
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/ {
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model = "Renesas SMARC EVK based on r9a07g044l2";
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compatible = "renesas,smarc-evk", "renesas,r9a07g044l2", "renesas,r9a07g044";
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};
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