Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
36 lines
805 B
Devicetree
36 lines
805 B
Devicetree
// SPDX-License-Identifier: GPL-2.0-only
|
|
/*
|
|
* Copyright (c) Siemens AG, 2021-2023
|
|
*
|
|
* Authors:
|
|
* Chao Zeng <chao.zeng@siemens.com>
|
|
* Jan Kiszka <jan.kiszka@siemens.com>
|
|
*
|
|
* Common bits of the IOT2050 Basic and Advanced variants, PG2
|
|
*/
|
|
|
|
&main_pmx0 {
|
|
cp2102n_reset_pin_default: cp2102n-reset-default-pins {
|
|
pinctrl-single,pins = <
|
|
/* (AF12) GPIO1_24, used as cp2102 reset */
|
|
AM65X_IOPAD(0x01e0, PIN_OUTPUT, 7)
|
|
>;
|
|
};
|
|
};
|
|
|
|
&main_gpio1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 =
|
|
<&main_pcie_enable_pins_default>,
|
|
<&cp2102n_reset_pin_default>;
|
|
gpio-line-names =
|
|
"", "", "", "", "", "", "", "", "", "",
|
|
"", "", "", "", "", "", "", "", "", "",
|
|
"", "", "", "", "CP2102N-RESET";
|
|
};
|
|
|
|
&dss {
|
|
/* Workaround needed to get DP clock of 154Mhz */
|
|
assigned-clocks = <&k3_clks 67 0>;
|
|
};
|