Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
66 lines
1.2 KiB
Devicetree
66 lines
1.2 KiB
Devicetree
// SPDX-License-Identifier: GPL-2.0
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#include <dt-bindings/clock/mediatek,mtmips-sysc.h>
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "ralink,rt2880-soc";
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cpus {
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cpu@0 {
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compatible = "mips,mips4KEc";
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};
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};
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cpuintc: cpuintc {
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#address-cells = <0>;
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#interrupt-cells = <1>;
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interrupt-controller;
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compatible = "mti,cpu-interrupt-controller";
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};
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palmbus@300000 {
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compatible = "palmbus";
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reg = <0x300000 0x200000>;
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ranges = <0x0 0x300000 0x1FFFFF>;
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#address-cells = <1>;
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#size-cells = <1>;
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sysc: syscon@0 {
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compatible = "ralink,rt2880-sysc", "syscon";
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reg = <0x0 0x100>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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intc: intc@200 {
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compatible = "ralink,rt2880-intc";
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reg = <0x200 0x100>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&cpuintc>;
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interrupts = <2>;
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};
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memc@300 {
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compatible = "ralink,rt2880-memc";
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reg = <0x300 0x100>;
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};
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uartlite@c00 {
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compatible = "ralink,rt2880-uart", "ns16550a";
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reg = <0xc00 0x100>;
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clocks = <&sysc RT2880_CLK_UARTLITE>;
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interrupt-parent = <&intc>;
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interrupts = <8>;
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reg-shift = <2>;
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};
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};
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};
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