Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
47 lines
851 B
C
47 lines
851 B
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Copyright (C) 2011 Tobias Klauser <tklauser@distanz.ch>
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*/
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#ifndef _ASM_NIOS2_CPUINFO_H
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#define _ASM_NIOS2_CPUINFO_H
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#include <linux/types.h>
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struct cpuinfo {
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/* Core CPU configuration */
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char cpu_impl[12];
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u32 cpu_clock_freq;
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bool mmu;
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bool has_div;
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bool has_mul;
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bool has_mulx;
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bool has_bmx;
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bool has_cdx;
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/* CPU caches */
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u32 icache_line_size;
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u32 icache_size;
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u32 dcache_line_size;
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u32 dcache_size;
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/* TLB */
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u32 tlb_pid_num_bits; /* number of bits used for the PID in TLBMISC */
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u32 tlb_num_ways;
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u32 tlb_num_ways_log2;
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u32 tlb_num_entries;
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u32 tlb_num_lines;
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u32 tlb_ptr_sz;
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/* Addresses */
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u32 reset_addr;
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u32 exception_addr;
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u32 fast_tlb_miss_exc_addr;
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};
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extern struct cpuinfo cpuinfo;
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extern void setup_cpuinfo(void);
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#endif /* _ASM_NIOS2_CPUINFO_H */
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