Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
39 lines
891 B
C
39 lines
891 B
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
|
|
/*
|
|
* Cell Broadband Engine Performance Monitor
|
|
*
|
|
* (C) Copyright IBM Corporation 2006
|
|
*
|
|
* Author:
|
|
* David Erb (djerb@us.ibm.com)
|
|
* Kevin Corry (kevcorry@us.ibm.com)
|
|
*/
|
|
|
|
#ifndef __ASM_CELL_PMU_H__
|
|
#define __ASM_CELL_PMU_H__
|
|
|
|
/* The Cell PMU has four hardware performance counters, which can be
|
|
* configured as four 32-bit counters or eight 16-bit counters.
|
|
*/
|
|
#define NR_PHYS_CTRS 4
|
|
#define NR_CTRS (NR_PHYS_CTRS * 2)
|
|
|
|
/* Macros for the pm_control register. */
|
|
#define CBE_PM_16BIT_CTR(ctr) (1 << (24 - ((ctr) & (NR_PHYS_CTRS - 1))))
|
|
|
|
/* Macros for the trace_address register. */
|
|
#define CBE_PM_TRACE_BUF_EMPTY 0x00000400
|
|
|
|
enum pm_reg_name {
|
|
group_control,
|
|
debug_bus_control,
|
|
trace_address,
|
|
ext_tr_timer,
|
|
pm_status,
|
|
pm_control,
|
|
pm_interval,
|
|
pm_start_stop,
|
|
};
|
|
|
|
#endif /* __ASM_CELL_PMU_H__ */
|