Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
32 lines
1.0 KiB
C
32 lines
1.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* cbe_regs.h
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*
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* This file is intended to hold the various register definitions for CBE
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* on-chip system devices (memory controller, IO controller, etc...)
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*
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* (C) Copyright IBM Corporation 2001,2006
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*
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* Authors: Maximino Aguilar (maguilar@us.ibm.com)
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* David J. Erb (djerb@us.ibm.com)
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*
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* (c) 2006 Benjamin Herrenschmidt <benh@kernel.crashing.org>, IBM Corp.
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*/
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#ifndef CBE_REGS_H
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#define CBE_REGS_H
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#include <asm/cell-pmu.h>
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/* Cell page table entries */
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#define CBE_IOPTE_PP_W 0x8000000000000000ul /* protection: write */
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#define CBE_IOPTE_PP_R 0x4000000000000000ul /* protection: read */
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#define CBE_IOPTE_M 0x2000000000000000ul /* coherency required */
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#define CBE_IOPTE_SO_R 0x1000000000000000ul /* ordering: writes */
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#define CBE_IOPTE_SO_RW 0x1800000000000000ul /* ordering: r & w */
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#define CBE_IOPTE_RPN_Mask 0x07fffffffffff000ul /* RPN */
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#define CBE_IOPTE_H 0x0000000000000800ul /* cache hint */
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#define CBE_IOPTE_IOID_Mask 0x00000000000007fful /* ioid */
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#endif /* CBE_REGS_H */
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