Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
49 lines
1.5 KiB
C
49 lines
1.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
|
|
/*
|
|
* Performance event support - hardware-specific disambiguation
|
|
*
|
|
* For now this is a compile-time decision, but eventually it should be
|
|
* runtime. This would allow multiplatform perf event support for e300 (fsl
|
|
* embedded perf counters) plus server/classic, and would accommodate
|
|
* devices other than the core which provide their own performance counters.
|
|
*
|
|
* Copyright 2010 Freescale Semiconductor, Inc.
|
|
*/
|
|
|
|
#ifdef CONFIG_PPC_PERF_CTRS
|
|
#include <asm/perf_event_server.h>
|
|
#else
|
|
static inline bool is_sier_available(void) { return false; }
|
|
static inline unsigned long get_pmcs_ext_regs(int idx) { return 0; }
|
|
#endif
|
|
|
|
#ifdef CONFIG_FSL_EMB_PERF_EVENT
|
|
#include <asm/perf_event_fsl_emb.h>
|
|
#endif
|
|
|
|
#ifdef CONFIG_PERF_EVENTS
|
|
#include <asm/ptrace.h>
|
|
#include <asm/reg.h>
|
|
|
|
#define perf_arch_bpf_user_pt_regs(regs) ®s->user_regs
|
|
|
|
/*
|
|
* Overload regs->result to specify whether we should use the MSR (result
|
|
* is zero) or the SIAR (result is non zero).
|
|
*/
|
|
#define perf_arch_fetch_caller_regs(regs, __ip) \
|
|
do { \
|
|
(regs)->result = 0; \
|
|
(regs)->nip = __ip; \
|
|
(regs)->gpr[1] = current_stack_frame(); \
|
|
asm volatile("mfmsr %0" : "=r" ((regs)->msr)); \
|
|
} while (0)
|
|
|
|
/* To support perf_regs sier update */
|
|
extern bool is_sier_available(void);
|
|
extern unsigned long get_pmcs_ext_regs(int idx);
|
|
/* To define perf extended regs mask value */
|
|
extern u64 PERF_REG_EXTENDED_MASK;
|
|
#define PERF_REG_EXTENDED_MASK PERF_REG_EXTENDED_MASK
|
|
#endif
|