Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
41 lines
1.0 KiB
Devicetree
41 lines
1.0 KiB
Devicetree
// SPDX-License-Identifier: GPL-2.0 OR MIT
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/*
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* Copyright (C) 2021 StarFive Technology Co., Ltd.
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* Copyright (C) 2021 Emil Renner Berthing <kernel@esmil.dk>
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*/
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/dts-v1/;
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#include "jh7100-common.dtsi"
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/ {
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model = "StarFive VisionFive V1";
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compatible = "starfive,visionfive-v1", "starfive,jh7100";
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gpio-restart {
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compatible = "gpio-restart";
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gpios = <&gpio 63 GPIO_ACTIVE_HIGH>;
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priority = <224>;
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};
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};
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&gmac {
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phy-handle = <&phy>;
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};
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/*
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* The board uses a Motorcomm YT8521 PHY supporting RGMII-ID, but requires
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* manual adjustment of the RX internal delay to work properly. The default
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* RX delay provided by the driver (1.95ns) is too high, but applying a 50%
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* reduction seems to mitigate the issue.
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*
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* It is worth noting the adjustment is not necessary on BeagleV Starlight SBC,
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* which uses a Microchip PHY. Hence, most likely the Motorcomm PHY is the one
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* responsible for the misbehaviour, not the GMAC.
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*/
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&mdio {
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phy: ethernet-phy@0 {
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reg = <0>;
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rx-internal-delay-ps = <900>;
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};
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};
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