Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
46 lines
950 B
C
46 lines
950 B
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* SDK7786 FPGA IRQ Controller Support.
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*
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* Copyright (C) 2010 Matt Fleming
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* Copyright (C) 2010 Paul Mundt
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*/
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#include <linux/irq.h>
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#include <mach/fpga.h>
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#include <mach/irq.h>
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enum {
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ATA_IRQ_BIT = 1,
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SPI_BUSY_BIT = 2,
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LIRQ5_BIT = 3,
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LIRQ6_BIT = 4,
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LIRQ7_BIT = 5,
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LIRQ8_BIT = 6,
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KEY_IRQ_BIT = 7,
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PEN_IRQ_BIT = 8,
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ETH_IRQ_BIT = 9,
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RTC_ALARM_BIT = 10,
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CRYSTAL_FAIL_BIT = 12,
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ETH_PME_BIT = 14,
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};
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void __init sdk7786_init_irq(void)
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{
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unsigned int tmp;
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/* Enable priority encoding for all IRLs */
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fpga_write_reg(fpga_read_reg(INTMSR) | 0x0303, INTMSR);
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/* Clear FPGA interrupt status registers */
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fpga_write_reg(0x0000, INTASR);
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fpga_write_reg(0x0000, INTBSR);
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/* Unmask FPGA interrupts */
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tmp = fpga_read_reg(INTAMR);
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tmp &= ~(1 << ETH_IRQ_BIT);
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fpga_write_reg(tmp, INTAMR);
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plat_irq_setup_pins(IRQ_MODE_IRL7654_MASK);
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plat_irq_setup_pins(IRQ_MODE_IRL3210_MASK);
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}
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