Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
59 lines
1.4 KiB
C
59 lines
1.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
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#ifndef _ASM_X86_PERF_REGS_H
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#define _ASM_X86_PERF_REGS_H
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enum perf_event_x86_regs {
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PERF_REG_X86_AX,
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PERF_REG_X86_BX,
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PERF_REG_X86_CX,
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PERF_REG_X86_DX,
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PERF_REG_X86_SI,
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PERF_REG_X86_DI,
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PERF_REG_X86_BP,
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PERF_REG_X86_SP,
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PERF_REG_X86_IP,
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PERF_REG_X86_FLAGS,
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PERF_REG_X86_CS,
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PERF_REG_X86_SS,
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PERF_REG_X86_DS,
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PERF_REG_X86_ES,
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PERF_REG_X86_FS,
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PERF_REG_X86_GS,
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PERF_REG_X86_R8,
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PERF_REG_X86_R9,
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PERF_REG_X86_R10,
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PERF_REG_X86_R11,
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PERF_REG_X86_R12,
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PERF_REG_X86_R13,
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PERF_REG_X86_R14,
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PERF_REG_X86_R15,
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/* These are the limits for the GPRs. */
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PERF_REG_X86_32_MAX = PERF_REG_X86_GS + 1,
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PERF_REG_X86_64_MAX = PERF_REG_X86_R15 + 1,
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/* These all need two bits set because they are 128bit */
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PERF_REG_X86_XMM0 = 32,
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PERF_REG_X86_XMM1 = 34,
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PERF_REG_X86_XMM2 = 36,
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PERF_REG_X86_XMM3 = 38,
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PERF_REG_X86_XMM4 = 40,
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PERF_REG_X86_XMM5 = 42,
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PERF_REG_X86_XMM6 = 44,
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PERF_REG_X86_XMM7 = 46,
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PERF_REG_X86_XMM8 = 48,
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PERF_REG_X86_XMM9 = 50,
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PERF_REG_X86_XMM10 = 52,
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PERF_REG_X86_XMM11 = 54,
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PERF_REG_X86_XMM12 = 56,
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PERF_REG_X86_XMM13 = 58,
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PERF_REG_X86_XMM14 = 60,
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PERF_REG_X86_XMM15 = 62,
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/* These include both GPRs and XMMX registers */
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PERF_REG_X86_XMM_MAX = PERF_REG_X86_XMM15 + 2,
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};
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#define PERF_REG_EXTENDED_MASK (~((1ULL << PERF_REG_X86_XMM0) - 1))
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#endif /* _ASM_X86_PERF_REGS_H */
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