Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
24 lines
566 B
C
24 lines
566 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef __RESET_PRCC_H
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#define __RESET_PRCC_H
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#include <linux/reset-controller.h>
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#include <linux/io.h>
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/**
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* struct u8500_prcc_reset - U8500 PRCC reset controller state
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* @rcdev: reset controller device
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* @phy_base: the physical base address for each PRCC block
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* @base: the remapped PRCC bases
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*/
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struct u8500_prcc_reset {
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struct reset_controller_dev rcdev;
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u32 phy_base[CLKRST_MAX];
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void __iomem *base[CLKRST_MAX];
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};
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void u8500_prcc_reset_init(struct device_node *np, struct u8500_prcc_reset *ur);
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#endif
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