Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
73 lines
2.0 KiB
C
73 lines
2.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Copyright (C) 2016 BayLibre, SAS
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* Author: Neil Armstrong <narmstrong@baylibre.com>
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*/
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/* Video Input Unit */
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#ifndef __MESON_VIU_H
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#define __MESON_VIU_H
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/* OSDx_BLKx_CFG */
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#define OSD_MALI_SRC_EN BIT(30)
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#define OSD_CANVAS_SEL 16
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#define OSD_ENDIANNESS_LE BIT(15)
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#define OSD_ENDIANNESS_BE (0)
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#define OSD_BLK_MODE_422 (0x03 << 8)
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#define OSD_BLK_MODE_16 (0x04 << 8)
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#define OSD_BLK_MODE_32 (0x05 << 8)
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#define OSD_BLK_MODE_24 (0x07 << 8)
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#define OSD_OUTPUT_COLOR_RGB BIT(7)
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#define OSD_OUTPUT_COLOR_YUV (0)
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#define OSD_COLOR_MATRIX_32_RGBA (0x00 << 2)
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#define OSD_COLOR_MATRIX_32_ARGB (0x01 << 2)
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#define OSD_COLOR_MATRIX_32_ABGR (0x02 << 2)
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#define OSD_COLOR_MATRIX_32_BGRA (0x03 << 2)
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#define OSD_COLOR_MATRIX_24_RGB (0x00 << 2)
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#define OSD_COLOR_MATRIX_16_RGB655 (0x00 << 2)
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#define OSD_COLOR_MATRIX_16_RGB565 (0x04 << 2)
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#define OSD_MALI_COLOR_MODE_R8 (0 << 8)
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#define OSD_MALI_COLOR_MODE_YUV422 (1 << 8)
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#define OSD_MALI_COLOR_MODE_RGB565 (2 << 8)
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#define OSD_MALI_COLOR_MODE_RGBA5551 (3 << 8)
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#define OSD_MALI_COLOR_MODE_RGBA4444 (4 << 8)
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#define OSD_MALI_COLOR_MODE_RGBA8888 (5 << 8)
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#define OSD_MALI_COLOR_MODE_RGB888 (7 << 8)
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#define OSD_MALI_COLOR_MODE_YUV422_10B (8 << 8)
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#define OSD_MALI_COLOR_MODE_RGBA1010102 (9 << 8)
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#define OSD_INTERLACE_ENABLED BIT(1)
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#define OSD_INTERLACE_ODD BIT(0)
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#define OSD_INTERLACE_EVEN (0)
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/* OSDx_CTRL_STAT */
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#define OSD_ENABLE BIT(21)
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#define OSD_MEM_LINEAR_ADDR BIT(2)
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#define OSD_BLK0_ENABLE BIT(0)
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#define OSD_GLOBAL_ALPHA_SHIFT 12
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/* OSDx_CTRL_STAT2 */
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#define OSD_DPATH_MALI_AFBCD BIT(15)
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#define OSD_REPLACE_EN BIT(14)
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#define OSD_REPLACE_SHIFT 6
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#define OSD_PENDING_STAT_CLEAN BIT(1)
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void meson_viu_osd1_reset(struct meson_drm *priv);
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void meson_viu_g12a_enable_osd1_afbc(struct meson_drm *priv);
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void meson_viu_g12a_disable_osd1_afbc(struct meson_drm *priv);
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void meson_viu_gxm_enable_osd1_afbc(struct meson_drm *priv);
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void meson_viu_gxm_disable_osd1_afbc(struct meson_drm *priv);
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void meson_viu_init(struct meson_drm *priv);
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#endif /* __MESON_VIU_H */
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