Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
51 lines
1.6 KiB
C
51 lines
1.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/* Copyright (C) 2025 NVIDIA CORPORATION. All rights reserved. */
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#ifndef MEMORY_TEGRA_TEGRA264_BWMGR_H
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#define MEMORY_TEGRA_TEGRA264_BWMGR_H
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#define TEGRA264_BWMGR_ICC_PRIMARY 1
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#define TEGRA264_BWMGR_DEBUG 2
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#define TEGRA264_BWMGR_CPU_CLUSTER0 3
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#define TEGRA264_BWMGR_CPU_CLUSTER1 4
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#define TEGRA264_BWMGR_CPU_CLUSTER2 5
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#define TEGRA264_BWMGR_CPU_CLUSTER3 6
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#define TEGRA264_BWMGR_CPU_CLUSTER4 7
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#define TEGRA264_BWMGR_CPU_CLUSTER5 8
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#define TEGRA264_BWMGR_CPU_CLUSTER6 9
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#define TEGRA264_BWMGR_CACTMON 10
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#define TEGRA264_BWMGR_DISPLAY 11
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#define TEGRA264_BWMGR_VI 12
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#define TEGRA264_BWMGR_APE 13
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#define TEGRA264_BWMGR_VIFAL 14
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#define TEGRA264_BWMGR_GPU 15
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#define TEGRA264_BWMGR_EQOS 16
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#define TEGRA264_BWMGR_PCIE_0 17
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#define TEGRA264_BWMGR_PCIE_1 18
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#define TEGRA264_BWMGR_PCIE_2 19
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#define TEGRA264_BWMGR_PCIE_3 20
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#define TEGRA264_BWMGR_PCIE_4 21
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#define TEGRA264_BWMGR_PCIE_5 22
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#define TEGRA264_BWMGR_SDMMC_1 23
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#define TEGRA264_BWMGR_SDMMC_2 24
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#define TEGRA264_BWMGR_NVDEC 25
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#define TEGRA264_BWMGR_NVENC 26
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#define TEGRA264_BWMGR_NVJPG_0 27
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#define TEGRA264_BWMGR_NVJPG_1 28
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#define TEGRA264_BWMGR_OFAA 29
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#define TEGRA264_BWMGR_XUSB_HOST 30
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#define TEGRA264_BWMGR_XUSB_DEV 31
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#define TEGRA264_BWMGR_TSEC 32
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#define TEGRA264_BWMGR_VIC 33
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#define TEGRA264_BWMGR_APEDMA 34
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#define TEGRA264_BWMGR_SE 35
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#define TEGRA264_BWMGR_ISP 36
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#define TEGRA264_BWMGR_HDA 37
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#define TEGRA264_BWMGR_VI2FAL 38
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#define TEGRA264_BWMGR_VI2 39
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#define TEGRA264_BWMGR_RCE 40
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#define TEGRA264_BWMGR_PVA 41
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#define TEGRA264_BWMGR_NVPMODEL 42
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#endif
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