Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
53 lines
1.1 KiB
C
53 lines
1.1 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2005, Intec Automation Inc.
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* Copyright (C) 2014, Freescale Semiconductor, Inc.
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*/
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#include <linux/mtd/spi-nor.h>
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#include "core.h"
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static const struct flash_info everspin_nor_parts[] = {
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{
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.name = "mr25h128",
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.size = SZ_16K,
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.sector_size = SZ_16K,
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.addr_nbytes = 2,
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.flags = SPI_NOR_NO_ERASE,
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}, {
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.name = "mr25h256",
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.size = SZ_32K,
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.sector_size = SZ_32K,
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.addr_nbytes = 2,
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.flags = SPI_NOR_NO_ERASE,
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}, {
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.name = "mr25h10",
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.size = SZ_128K,
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.sector_size = SZ_128K,
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.flags = SPI_NOR_NO_ERASE,
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}, {
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.name = "mr25h40",
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.size = SZ_512K,
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.sector_size = SZ_512K,
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.flags = SPI_NOR_NO_ERASE,
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}
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};
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static void everspin_nor_default_init(struct spi_nor *nor)
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{
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/* Everspin FRAMs don't support the fast read opcode. */
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nor->params->hwcaps.mask &= ~SNOR_HWCAPS_READ_FAST;
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}
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static const struct spi_nor_fixups everspin_nor_fixups = {
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.default_init = everspin_nor_default_init,
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};
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const struct spi_nor_manufacturer spi_nor_everspin = {
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.name = "everspin",
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.parts = everspin_nor_parts,
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.nparts = ARRAY_SIZE(everspin_nor_parts),
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.fixups = &everspin_nor_fixups,
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};
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