Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
40 lines
1.0 KiB
C
40 lines
1.0 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
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/* Copyright (c) 2015-2018 Mellanox Technologies. All rights reserved */
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#ifndef _MLXSW_PORT_H
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#define _MLXSW_PORT_H
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#include <linux/types.h>
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#define MLXSW_PORT_MAX_MTU (10 * 1024)
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#define MLXSW_PORT_ETH_FRAME_HDR (ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN)
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#define MLXSW_PORT_DEFAULT_VID 1
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#define MLXSW_PORT_SWID_DISABLED_PORT 255
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#define MLXSW_PORT_SWID_ALL_SWIDS 254
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#define MLXSW_PORT_SWID_TYPE_IB 1
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#define MLXSW_PORT_SWID_TYPE_ETH 2
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#define MLXSW_PORT_MAX_IB_PHY_PORTS 36
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#define MLXSW_PORT_MAX_IB_PORTS (MLXSW_PORT_MAX_IB_PHY_PORTS + 1)
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#define MLXSW_PORT_CPU_PORT 0x0
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#define MLXSW_PORT_DONT_CARE 0xFF
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enum mlxsw_port_admin_status {
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MLXSW_PORT_ADMIN_STATUS_UP = 1,
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MLXSW_PORT_ADMIN_STATUS_DOWN = 2,
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MLXSW_PORT_ADMIN_STATUS_UP_ONCE = 3,
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MLXSW_PORT_ADMIN_STATUS_DISABLED = 4,
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};
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enum mlxsw_reg_pude_oper_status {
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MLXSW_PORT_OPER_STATUS_UP = 1,
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MLXSW_PORT_OPER_STATUS_DOWN = 2,
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MLXSW_PORT_OPER_STATUS_FAILURE = 4, /* Can be set to up again. */
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};
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#endif /* _MLXSW_PORT_H */
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