Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
128 lines
3.8 KiB
C
128 lines
3.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* stmmac_pcs.h: Physical Coding Sublayer Header File
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*
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* Copyright (C) 2016 STMicroelectronics (R&D) Limited
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* Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
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*/
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#ifndef __STMMAC_PCS_H__
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#define __STMMAC_PCS_H__
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#include <linux/phylink.h>
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#include <linux/slab.h>
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#include <linux/io.h>
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#include "common.h"
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/* PCS registers (AN/TBI/SGMII/RGMII) offsets */
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#define GMAC_AN_CTRL(x) (x) /* AN control */
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#define GMAC_AN_STATUS(x) (x + 0x4) /* AN status */
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/* ADV, LPA and EXP are only available for the TBI and RTBI interfaces */
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#define GMAC_ANE_ADV(x) (x + 0x8) /* ANE Advertisement */
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#define GMAC_ANE_LPA(x) (x + 0xc) /* ANE link partener ability */
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#define GMAC_ANE_EXP(x) (x + 0x10) /* ANE expansion */
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#define GMAC_TBI(x) (x + 0x14) /* TBI extend status */
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/* AN Configuration defines */
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#define GMAC_AN_CTRL_RAN BIT(9) /* Restart Auto-Negotiation */
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#define GMAC_AN_CTRL_ANE BIT(12) /* Auto-Negotiation Enable */
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#define GMAC_AN_CTRL_ELE BIT(14) /* External Loopback Enable */
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#define GMAC_AN_CTRL_ECD BIT(16) /* Enable Comma Detect */
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#define GMAC_AN_CTRL_LR BIT(17) /* Lock to Reference */
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#define GMAC_AN_CTRL_SGMRAL BIT(18) /* SGMII RAL Control */
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/* AN Status defines */
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#define GMAC_AN_STATUS_LS BIT(2) /* Link Status 0:down 1:up */
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#define GMAC_AN_STATUS_ANA BIT(3) /* Auto-Negotiation Ability */
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#define GMAC_AN_STATUS_ANC BIT(5) /* Auto-Negotiation Complete */
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#define GMAC_AN_STATUS_ES BIT(8) /* Extended Status */
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/* ADV and LPA defines */
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#define GMAC_ANE_FD BIT(5)
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#define GMAC_ANE_HD BIT(6)
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#define GMAC_ANE_PSE GENMASK(8, 7)
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#define GMAC_ANE_PSE_SHIFT 7
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#define GMAC_ANE_RFE GENMASK(13, 12)
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#define GMAC_ANE_RFE_SHIFT 12
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#define GMAC_ANE_ACK BIT(14)
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struct stmmac_priv;
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struct stmmac_pcs {
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struct stmmac_priv *priv;
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void __iomem *base;
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u32 int_mask;
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struct phylink_pcs pcs;
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};
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static inline struct stmmac_pcs *
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phylink_pcs_to_stmmac_pcs(struct phylink_pcs *pcs)
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{
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return container_of(pcs, struct stmmac_pcs, pcs);
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}
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int stmmac_integrated_pcs_init(struct stmmac_priv *priv, unsigned int offset,
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u32 int_mask);
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/**
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* dwmac_pcs_isr - TBI, RTBI, or SGMII PHY ISR
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* @ioaddr: IO registers pointer
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* @reg: Base address of the AN Control Register.
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* @intr_status: GMAC core interrupt status
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* @x: pointer to log these events as stats
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* Description: it is the ISR for PCS events: Auto-Negotiation Completed and
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* Link status.
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*/
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static inline void dwmac_pcs_isr(void __iomem *ioaddr, u32 reg,
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unsigned int intr_status,
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struct stmmac_extra_stats *x)
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{
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u32 val = readl(ioaddr + GMAC_AN_STATUS(reg));
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if (intr_status & PCS_ANE_IRQ) {
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x->irq_pcs_ane_n++;
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if (val & GMAC_AN_STATUS_ANC)
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pr_info("stmmac_pcs: ANE process completed\n");
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}
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if (intr_status & PCS_LINK_IRQ) {
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x->irq_pcs_link_n++;
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if (val & GMAC_AN_STATUS_LS)
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pr_info("stmmac_pcs: Link Up\n");
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else
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pr_info("stmmac_pcs: Link Down\n");
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}
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}
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/**
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* dwmac_ctrl_ane - To program the AN Control Register.
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* @ioaddr: IO registers pointer
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* @reg: Base address of the AN Control Register.
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* @ane: to enable the auto-negotiation
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* @srgmi_ral: to manage MAC-2-MAC SGMII connections.
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* Description: this is the main function to configure the AN control register
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* and init the ANE, select loopback (usually for debugging purpose) and
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* configure SGMII RAL.
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*/
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static inline void dwmac_ctrl_ane(void __iomem *ioaddr, u32 reg, bool ane,
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bool srgmi_ral)
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{
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u32 value = readl(ioaddr + GMAC_AN_CTRL(reg));
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/* Enable and restart the Auto-Negotiation */
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if (ane)
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value |= GMAC_AN_CTRL_ANE | GMAC_AN_CTRL_RAN;
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else
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value &= ~GMAC_AN_CTRL_ANE;
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/* In case of MAC-2-MAC connection, block is configured to operate
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* according to MAC conf register.
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*/
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if (srgmi_ral)
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value |= GMAC_AN_CTRL_SGMRAL;
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writel(value, ioaddr + GMAC_AN_CTRL(reg));
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}
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#endif /* __STMMAC_PCS_H__ */
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